jfunston / MultiCacheSimLinks
A cache simulator designed to be used with memory access traces obtained from Pin (www.pintool.org)
☆23Updated 7 years ago
Alternatives and similar repositories for MultiCacheSim
Users that are interested in MultiCacheSim are comparing it to the libraries listed below
Sorting:
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- A Multiplatform benchmark designed to provide holistic, detailed and close-to-hardware view of memory system performance with family of b…☆43Updated 3 months ago
- Simulator of a memory controller to connect DRAMSim and FlashDIMMSim into one unified memory☆17Updated last year
- (elastic) cuckoo hashing☆15Updated 5 years ago
- HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs☆30Updated last year
- Creating beautiful gem5 simulations☆49Updated 4 years ago
- Artifact, reproducibility, and testing utilites for gem5☆23Updated 4 years ago
- gem5 configuration for intel's skylake micro-architecture☆53Updated 4 years ago
- A Shared Memory Multithreaded Graph Benchmark Suite for Multicores☆36Updated 8 months ago
- Memory System Microbenchmarks☆65Updated 2 years ago
- Victima is a new software-transparent technique that greatly extends the address translation reach of modern processors by leveraging the…☆32Updated 2 years ago
- ☆22Updated 2 months ago
- ☆19Updated 4 years ago
- ☆21Updated 5 years ago
- A fast and scalable x86-64 multicore simulator☆31Updated 4 years ago
- Simulator or Non-Uniform Cache Architectures☆10Updated 7 years ago
- ☆31Updated last week
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆23Updated 5 years ago
- Examples of DPU programs using the UPMEM DPU SDK☆45Updated last year
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆33Updated last year
- Quick & Flexible Rack-Scale Computer Architecture Simulator☆53Updated 3 weeks ago
- Source code of the simulator used in the Mosaic paper from MICRO 2017: "Mosaic: A GPU Memory Manager with Application-Transparent Support…☆50Updated 7 years ago
- Designing directory cache coherence protocols is complicated because coherence transactions are not atomic in modern multicore processors…☆16Updated 4 years ago
- gem5-nvmain hybrid simulator supporting simulation of DRAM-NVM hybrid memory system☆79Updated 6 years ago
- ☆64Updated 3 years ago
- The gem5-X open source framework (based on the gem5 simulator)☆42Updated 2 years ago
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆59Updated 6 years ago
- Source code for the Base-Delta-Immediate Compression Algorithm (described in the PACT 2012 paper by Pekhimenko et al. at http://users.ece…☆28Updated 10 years ago
- The Splash-3 benchmark suite☆45Updated 2 years ago
- A simulator integrates ChampSim and Ramulator.☆19Updated 5 months ago