Alternatives and similar repositories for logisim-RISC-V-CPU

Users that are interested in logisim-RISC-V-CPU are comparing it to the libraries listed below

• zeeshanrafique23 / RV32I-Logisim
  RV32I single cycle simulation on open-source software Logisim.
  ☆21Updated 3 years ago
• risclite / ARM9-compatible-soft-CPU-core
  This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone be…
  ☆89Updated 5 years ago
• Arlet / verilog-65C02-microcode
  65C02 microprocessor in verilog, small size,reduced cycle count, asynchronous interface
  ☆75Updated 2 years ago
• nsauzede / cpu86
  🔌 CPU86 - Free VHDL CPU8088 IP core - ported to Papilio and Max1000 FPGA
  ☆46Updated 3 months ago
• robfinch / Cores
  ☆75Updated 5 months ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆41Updated 3 years ago
• vmunoz82 / ise14
  EDA Tools: Xilinx ISE 14.7 Dockerfile
  ☆21Updated 3 years ago
• sehugg / fpga-examples
  FPGA examples for 8bitworkshop.com
  ☆28Updated 6 years ago
• x653 / xv6-riscv-fpga
  Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).
  ☆56Updated 2 years ago
• Obijuan / Z80-FPGA
  Z80 CPU for OpenFPGAs, with Icestudio
  ☆87Updated last year
• Wren6991 / Hazard5
  5-stage RISC-V CPU, originally developed for RISCBoy
  ☆35Updated 2 years ago
• rolandbernard / kleine-riscv
  A small and simple rv32i core written in Verilog
  ☆17Updated 3 years ago
• n24bass / ice40_8bitworkshop
  "Designing Video Game Hardware in Verilog" in iCE40HX8K Breakout Board.
  ☆17Updated 5 years ago
• gundy / tinyfpga-bx-game-soc
  A PicoRV32 SoC for the TinyFPGA BX with peripherals designed for building games
  ☆23Updated 7 years ago
• nand2mario / ddr3-tang-primer-20k
  DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.
  ☆65Updated 2 years ago
• hdl-util / vga-text-mode
  VGA-compatible text mode functionality
  ☆17Updated 5 years ago
• ultraembedded / core_uriscv
  Another tiny RISC-V implementation
  ☆61Updated 4 years ago
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆70Updated 3 years ago
• RobertBaruch / plugh-1
  A CPU on an FPGA that you can play Zork on
  ☆51Updated 8 years ago
• wel97459 / FPGACosmacELF
  A re-creation of a Cosmac ELF computer, Coded in SpinalHDL
  ☆42Updated 4 years ago
• MorrisMA / M65C02A
  Enhanced 6502/65C02 Microprogrammed FPGA Processor Core (Verilog-2001)
  ☆33Updated 3 years ago
• emilbiju / emil-risc-v
  32 bit RISC-V CPU implementation in Verilog
  ☆33Updated 3 years ago
• abnoname / iceZ0mb1e
  FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC
  ☆59Updated 2 years ago
• Johnlon / spam-1
  Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my r…
  ☆69Updated 2 years ago
• lxp32 / lxp32-cpu
  A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
  ☆65Updated 6 months ago
• sifferman / fpga_screensaver
  This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board…
  ☆13Updated 2 years ago
• WillGreen / timetoexplore
  Source code to accompany https://timetoexplore.net
  ☆63Updated 5 years ago
• PrincetonUniversity / piton-sw
  ☆19Updated 5 years ago
• rschlaikjer / fpga-3-softcores
  Example Risc-V SoC with VexRiscv, custom peripherals and bare metal firmware
  ☆13Updated 5 years ago
• olgirard / openmsp430
  The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
  ☆69Updated 7 years ago