Alternatives and similar repositories for bfsh:

Users that are interested in bfsh are comparing it to the libraries listed below

• CMU-SAFARI / Virtuoso
  Virtuoso is a new simulator that focuses on modelling various memory management and virtual memory aspects.
  ☆39Updated this week
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago
• miaochenlu / Gem5_tutorials
  ☆18Updated last year
• jiegec / cpu-micro-benchmarks
  CPU micro benchmarks
  ☆52Updated this week
• Synthesys-Lab / assassyn
  Asynchronous semantics for architectural simulation and synthesis.
  ☆18Updated last week
• yhtzd / skyloft
  Skyloft: A General High-Efficient Scheduling Framework in User Space (SOSP 2024)
  ☆33Updated 6 months ago
• jiegec / chisel-memory-lower
  Lower chisel memories to SRAM macros
  ☆12Updated last year
• jiegec / cpu
  Microarchitecture diagrams of several CPUs
  ☆26Updated 2 weeks ago
• TiledTensor / TiledKernel
  TiledKernel is a code generation library based on macro kernels and memory hierarchy graph data structure.
  ☆19Updated 10 months ago
• efeslab / moesi-prime
  ☆15Updated 2 years ago
• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated 2 years ago
• ychen306 / vegen
  ☆28Updated 2 years ago
• regehr / pldi22-llvm-tutorial
  outline and links for PLDI 2022 tutorial
  ☆17Updated 2 years ago
• daniellustig / riscv-memory-model
  A formalization of the RVWMO (RISC-V) memory model
  ☆32Updated 2 years ago
• oscomp / proj23-lightweight-hypervisor
  在RISC-V处理器上实现一个轻量级的Hypervisor。
  ☆12Updated 4 years ago
• uwplse / rake
  compiling DSLs to high-level hardware instructions
  ☆22Updated 2 years ago
• wangrunji0408 / rjrouter
  [AFK] Hardware router in Chisel (THU Network Joint Lab 2020)
  ☆14Updated 4 years ago
• WukLab / FPGA-OS
  ☆33Updated 4 years ago
• gty111 / PTX-EMU
  PTX-EMU is a simple emulator for CUDA program.
  ☆30Updated last year
• MashPlant / decaf-rs
  Framework of pa code for THU compiler principle course.
  ☆13Updated 5 years ago
• JohndeVostok / APE
  A GPU FP32 computation method with Tensor Cores.
  ☆20Updated 2 years ago
• aakahlow / gem5Valid_Haswell
  ☆18Updated 5 years ago
• MashPlant / lalr1
  An LALR1(1)/LL(1) parser generator in Rust, for multiple languages.
  ☆49Updated 3 years ago
• oscomp / proj6-user-level-interrupt
  基于FPGA实现用户态中断硬件机制与优化操作系统内核
  ☆9Updated this week
• aqjune / mlir-tv
  A translation validation framework for MLIR
  ☆81Updated 2 weeks ago
• lastweek / lastweek.github.io
  Yizhou' Homepage
  ☆47Updated 4 months ago
• thu-cs-lab / verilog-coding-standard
  Recommended coding standard of Verilog and SystemVerilog.
  ☆34Updated 3 years ago
• CircuitCoder / ChannelOS
  What if everything is a io_uring?
  ☆16Updated 2 years ago
• cslab-ntua / contiguity-isca2020
  Linux source code for ISCA 2020 paper "Enhancing and Exploiting Contiguity for Fast Memory Virtualization"
  ☆17Updated 4 years ago
• Nelson-Cheung / yatsenos-riscv
  Rebuild YatSenOS On RISC-V 64.
  ☆19Updated 3 years ago