Alternatives and similar repositories for ysyx-npc-workbench

Users that are interested in ysyx-npc-workbench are comparing it to the libraries listed below

• yizishun / ysyx-framework
  A framework for ysyx flow
  ☆13Updated last year
• leesum1 / ysyx
  一生一芯项目
  ☆18Updated 2 years ago
• github-3rr0r / RV32ISC
  A RISC-V RV32I ISA Single Cycle CPU
  ☆25Updated 7 months ago
• wataru030-XIAOHEI / My-RISCV64-CORE-writing
  一生一芯 ， ysyx ， npc . the repo of the YSYX project . a riscv-64 CPU . writing .
  ☆32Updated 3 years ago
• ysyx-ta / ysyx-summer-readings
  ☆67Updated last year
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆192Updated last year
• OSCPU / yosys-sta
  ☆89Updated last month
• OSCPU / ysyxSoC
  ☆91Updated 2 months ago
• peilin-chen / Zhulong-RISCV-CPU
  CPU Design Based on RISCV ISA
  ☆126Updated last year
• Yawei-Ding / ysyx_riscv64_cpu
  ☆72Updated 2 years ago
• OSCPU-Zhoushan / Zhoushan
  Open Source Chip Project by University (OSCPU) - Zhoushan Core
  ☆54Updated 3 years ago
• Groupsun / riscv-mini-five-stage
  This is my graduation project, a simple processor soft core, which implements RV32I ISA.
  ☆16Updated 6 years ago
• zhhangBian / BOOM_chip
  乱序双发处理器，在2024年计算机系统能力大赛CPU赛道（龙芯杯）获二等奖，全国第四
  ☆16Updated last year
• Lyncien / RISC-V-32I
  体系结构课程实验：RISC-V 32I 流水线 CPU，实现37条指令，转发，冒险检测，Cache，分支预测器
  ☆85Updated 6 years ago
• puckbee / moli
  ☆36Updated 5 months ago
• xiaoan109 / ysyx-workbench
  一生一芯CPU/目前做到cache/后续主要考虑ASIC DV
  ☆22Updated 11 months ago
• OSCPU / ysyx-workbench
  ☆159Updated last week
• tastynoob / aura-core
  "aura" my super-scalar O3 cpu core
  ☆24Updated last year
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆166Updated 3 years ago
• Azalea8 / riscv_cpu
  riscv指令集，单周期以及五级流水线CPU
  ☆101Updated 11 months ago
• kaitoukito / Integrated-Circuit-Textbooks
  Collect some IC textbooks for learning.
  ☆178Updated 3 years ago
• 15947470421 / digital_IC_experiment
  我设计了一些数字集成电路的教学实验，供大家学习~
  ☆34Updated 11 months ago
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆31Updated 8 months ago
• siyueyinghua / UVMInPracticesByZhangQiang
  《UVM实战》书本源代码和UVM 1.1d源码及Doc
  ☆41Updated 4 years ago
• CmdBlockZQG / rvcore-mini-linux
  Build mini linux for your own RISC-V emulator!
  ☆24Updated last year
• RV-BOSC / OpenNoC
  ☆214Updated 6 months ago
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆41Updated 5 years ago
• renyangang / riscv-mcu
  This project utilizes the Digital circuit simulation software,to build a CPU that supports a simple instruction set and simple peripheral…
  ☆74Updated 8 months ago
• SocialistDalao / UltraMIPS_NSCSCC
  UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
  ☆146Updated last year
• OSCPU / chisel-playground
  ☆68Updated 10 months ago