Running Linux on IOb-SoC-OpenCryptoHW
☆16Aug 15, 2024Updated 2 years ago
Alternatives and similar repositories for iob-soc-opencryptolinux
Users that are interested in iob-soc-opencryptolinux are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Reconfigurable Hardware-Accelerated Open-Source Cryptographic IP Cores☆13Feb 23, 2025Updated last year
- a Python framework for managing embedded HW/SW projects☆24Oct 6, 2026Updated last week
- Coarse Grained Reconfigurable Array Generator☆22Sep 16, 2026Updated 3 weeks ago
- RISC-V System on Chip Template☆162Aug 26, 2026Updated last month
- IOb_SoC version of the Picorv32 RISC-V Verilog IP core☆15Sep 21, 2026Updated 3 weeks ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verilog Configurable Cache☆197Sep 21, 2026Updated 3 weeks ago
- UART 16550 core☆44Jul 17, 2014Updated 12 years ago
- MathLib DAC 2023 version☆13Sep 11, 2023Updated 3 years ago
- A Z80 CPU implemented in Chisel.☆11Sep 20, 2020Updated 6 years ago
- This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl☆11Nov 3, 2021Updated 4 years ago
- Hoddarla is an OS project in Golang targeting RISC-V 64-bit system.☆12Oct 28, 2021Updated 4 years ago
- Linux development repository for socfpga☆16May 27, 2026Updated 4 months ago
- ☆10Oct 8, 2021Updated 5 years ago
- A RISC-V assembler library for Scala/Chisel HDL projects☆16Aug 27, 2026Updated last month
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Fork of spirit2_free only for QualComm based processors.☆15Jan 17, 2020Updated 6 years ago
- A Virtual platform using DBT-RISE-RISCV capable of running unmodified FreeRTOS☆15Jan 30, 2024Updated 2 years ago
- Ethernet MAC 10/100 Mbps☆90Oct 2, 2019Updated 7 years ago
- Personal mirror for adv_debug_sys☆11Aug 23, 2011Updated 15 years ago
- Simple Tool Caller for llama.cpp☆11Aug 12, 2024Updated 2 years ago
- A Tiny RISC-V-Controlled SNN Processor for Real-Time Sensor Data Analysis on Low-Power FPGAs☆26Sep 29, 2026Updated 2 weeks ago
- WebUSB FTDI Driver☆28Apr 8, 2023Updated 3 years ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆239Aug 25, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- WM8731 Audio CODEC using Verilog (DE2-115)☆11Jul 28, 2019Updated 7 years ago
- Bluespec environment for working with the ulx3s board and its lattice ecp5 fpga☆15Mar 9, 2025Updated last year
- APB Timer Unit☆14Oct 30, 2025Updated 11 months ago
- Dual RISC-V DISC with integrated eFPGA☆18Oct 9, 2021Updated 5 years ago
- ☆12Aug 1, 2023Updated 3 years ago
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆25Jan 7, 2016Updated 10 years ago
- Source code of the U-TRR methodology presented in "Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHamme…☆19Nov 15, 2022Updated 3 years ago
- ☆21Mar 3, 2026Updated 7 months ago
- Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory…☆31Oct 18, 2018Updated 7 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Cryptography accelerator ASIC (for AES128/AES256 and SHA256) using Skywater 130nm process node (build-environment repo).☆11Jan 13, 2021Updated 5 years ago
- This paper presents design of UART module for serial communication used for short-distance, low speed and exchange of data between comput…☆15Mar 30, 2022Updated 4 years ago
- Pipelined Processor which implements RV32i Instruction Set. Also contains pipelined L1 4-way set-associative Instruction Cache, direct-ma…☆15Dec 23, 2022Updated 3 years ago
- Cache Controller for a multi-level Cache memory using four-way set-associative mapping with write-back, no-write allocate and LRU policy.…☆10Jul 22, 2020Updated 6 years ago
- cheriot-kudu is a 32-bit dual-issue RISC-V MCU core with CHERIoT support☆19Updated this week
- The top repository for the code accompanying our paper "Mind the Gap: Studying the Insecurity of Provably Secure Embedded Trusted Executi…☆16Aug 3, 2022Updated 4 years ago
- A nest brain simulator based on FPGA(LIF NEURON)☆16Dec 14, 2021Updated 4 years ago