Alternatives and similar repositories for wiki

Users that are interested in wiki are comparing it to the libraries listed below

• cpuex2019-yokyo / core
  RISC-V (rv32imf) CPU implemented in System Verilog for cpuex2019 @ UTokyo
  ☆13Updated 5 years ago
• kadomoto / poyo-v
  Open source RISC-V IP core for FPGA/ASIC design
  ☆31Updated last year
• nlsynth / karuta
  Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for F…
  ☆107Updated 3 years ago
• msyksphinz-self / swimmer_riscv
  Instruction set simulator for RISC-V
  ☆53Updated 5 years ago
• sakura-internet / nvme-pcie-to-fabrics-proxy
  (under construction) Experimental circuit design for FPGA based PCIe accelerator board providing emulated NVMe/PCIe device that its read/…
  ☆25Updated 2 years ago
• liva / xhci_uio
  ☆28Updated 7 years ago
• garasubo / T-Visor
  Real-time hypervisor for ARM
  ☆64Updated 9 years ago
• polyphony-dev / polyphony
  Polyphony is Python based High-Level Synthesis compiler.
  ☆107Updated 8 months ago
• yasukata / iip
  iip: an integratable TCP/IP stack
  ☆90Updated last month
• i4kimura / chip_architect
  Translation of http://chip-architect.com/news/2003_09_21_Detailed_Architecture_of_AMDs_64bit_Core.html
  ☆11Updated 6 years ago
• ryuz / jelly
  Original FPGA platform
  ☆69Updated this week
• shibatchii / RISC-V
  RISC-V documentation transrate to Japanese.
  ☆73Updated 3 years ago
• atsisy / sloba
  Stacking List Oriented Basic Architecture Allocator
  ☆15Updated 6 years ago
• nlsynth / iroha
  Intermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)
  ☆36Updated 4 years ago
• panda5mt / KyogenRV
  The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.
  ☆47Updated 4 years ago
• aquaxis / synverll
  ☆15Updated 9 years ago
• drpnd / advos
  Developing an operating system from scratch (Advent Calendar 2018)
  ☆18Updated 5 years ago
• onikiri / onikiri2
  ☆39Updated last year
• alphaKAI / cr0cd
  CR0.CD manipulate Linux Kernel Module as a proc filesystem
  ☆19Updated 6 years ago
• moizumi99 / m99_riscv_emulator
  Simple RISC-V emulator
  ☆16Updated 5 years ago
• NextMicon / NextMiconIDE
  🛠️ Graphical IDE for NextMicon
  ☆28Updated last year
• k-mrm / Pilevisor
  aarch64 thin hypervisor for resource aggregation
  ☆36Updated 6 months ago
• syuu1228 / howto_implement_hypervisor
  Software Design誌の連載「ハイパーバイザの作り方」の原稿公開用リポジトリ
  ☆221Updated 7 years ago
• susanow / susanow
  Thread based NFVi on DPDK
  ☆26Updated 7 years ago
• ciniml / seccamp_2022_riscv_cpu
  セキュリティキャンプ 2022 Y4 RISC-V CPU自作ゼミ 講義資料
  ☆29Updated last year
• tnishinaga / kozos-rpi
  こちらは教育用自作組み込みOSであるKOZOSをRaspberry Piへ移植したものです。This is an KOZOS(http://kozos.jp/kozos/) port to Raspberry Pi.
  ☆20Updated 8 years ago
• takeharukato / yatos
  Yet Another Teachable Operating System
  ☆35Updated 5 years ago
• PyHDI / PyCoRAM
  Python-based Portable IP-core Synthesis Framework for FPGA-based Computing
  ☆53Updated 8 years ago
• PFLab-OS / Raph_Kernel
  ☆38Updated 7 years ago
• iij / ipgen
  interactive packet generator
  ☆110Updated 5 months ago