Alternatives and similar repositories for CRYSTALS-Dilithium_Key-Generation_Verilog

Users that are interested in CRYSTALS-Dilithium_Key-Generation_Verilog are comparing it to the libraries listed below

• GMUCERG / Dilithium
  High-speed full CRYSTALS-DILITHIUM implementation on FPGA: Keygen, Sign, Verify.
  ☆60Updated 2 years ago
• acmert / parametric-ntt
  Parametric NTT/INTT Hardware Generator
  ☆73Updated 4 years ago
• acmert / kyber-polmul-hw
  Hardware implementation of polynomial multiplication operation of CRYSTALS-KYBER PQC scheme
  ☆37Updated 3 years ago
• AdityaMohanty374 / NTT_Implementation
  Employed into Crystal-Kyber Algorithm, a prominent Lattice-based Post Quantum Cryptography(PQC) algorithm, for polynomial multiplication …
  ☆13Updated 5 months ago
• kemalderya / pqc-param-ntt
  ☆24Updated 3 years ago
• xingyf14 / CRYSTALS-Kyber
  ☆59Updated 4 years ago
• florianhirner / proteus
  ☆17Updated last year
• chipsalliance / adams-bridge
  Post-Quantum Cryptography IP Core (Crystals-Dilithium)
  ☆33Updated this week
• CityUHK-CALAS / SW-HW-Co-design-of-Dilithium
  This repository is for our paper "High-Performance and Configurable SW/HW Co-design of Post-Quantum Signature CRYSTALS-Dilithium" in ACM …
  ☆10Updated last year
• xiang-rc / cfntt_ref
  ☆36Updated last year
• eda-lab / AES-based-on-FPGA
  AES-based-on-FPGA developed by verilog.
  ☆22Updated 5 years ago
• LoganBrist / C-Verilog_NTT_RNS_Polymultiplier
  ☆26Updated 4 years ago
• XBQ314 / A-Number-Theoretic-Transform-Accelerator-with-Two-Parallel-Simplified-Butterfly-Units
  Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现，基为2，有两个并行的蝶形单元
  ☆19Updated 2 years ago
• michaelehab / AES-Verilog
  Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL
  ☆105Updated 3 years ago
• secworks / aes
  Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementatio…
  ☆376Updated 4 months ago
• russdill / bch_verilog
  Verilog based BCH encoder/decoder
  ☆123Updated 2 years ago
• abdelazeem201 / Design-and-ASIC-Implementation-of-32-Point-FFT-Processor
  I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …
  ☆44Updated last year
• lajanugen / Modular-Exponentiation
  Verilog Implementation of modular exponentiation using Montgomery multiplication
  ☆34Updated 10 years ago
• zdszx / Modexpowering3
  a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier
  ☆22Updated 3 years ago
• pnvamshi / Hardware-Implementation-of-AES-Verilog
  Hardware Implementation of Advanced Encryption Standard Algorithm in Verilog
  ☆40Updated 8 years ago
• KULeuven-COSIC / COSO-TRNG
  Reference implementation for the COherent Sampling ring Oscillator based True Random Number Generator.
  ☆13Updated 8 months ago
• briansune / FFT-R22SDF
  R22SDF FFT VLSI/FPGA investigate and implementation
  ☆16Updated 3 years ago
• KULeuven-COSIC / NTRU_NTT_HW
  ☆24Updated 3 years ago
• aneeshkandi14 / ascon-hw-public
  ☆21Updated last year
• mematrix / AES-FPGA
  AES加密解密算法的Verilog实现
  ☆67Updated 9 years ago
• freecores / sha3
  SHA3 (KECCAK)
  ☆19Updated 11 years ago
• pq-crypto / vpqc
  processor for post-quantum cryptography
  ☆16Updated 5 years ago
• ascon / ascon-hardware-sca
  NIST LWC Hardware Design of Ascon with Protection against Power Side-Channel Attacks
  ☆17Updated 2 years ago
• KULeuven-COSIC / Griffinfly-ZPRIZE-FPGA-NTT
  Griffinfly is COSIC's submission to the ZPRIZE competition under the category, Accelerating NTT Operations on an FPGA by Michiel Van Beir…
  ☆11Updated 2 years ago
• jmoles / keccak-verilog
  A Verilog (specifically, System Verilog) implementation of the not-yet-finalized SHA-3 winner, Keccak.
  ☆10Updated 4 years ago