Alternatives and similar repositories for tinyml

Users that are interested in tinyml are comparing it to the libraries listed below

• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆74Updated last year
• intel / fpga-npu
  ☆234Updated last year
• Fraunhofer-IMS / airisc_core_complex
  Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.
  ☆99Updated 6 months ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆157Updated 4 months ago
• embedeep / FREE-TPU-V3plus-for-FPGA
  FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
  ☆169Updated 2 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆107Updated 7 years ago
• hossein1387 / BARVINN
  BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/
  ☆94Updated last year
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆238Updated 5 months ago
• Xilinx / Kria-PYNQ
  PYNQ support and examples for Kria SOMs
  ☆120Updated last year
• thousrm / universal_NPU-CNN_accelerator
  hardware design of universal NPU(CNN accelerator) for various convolution neural network
  ☆160Updated 10 months ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆111Updated 5 years ago
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆107Updated 3 years ago
• pulp-platform / pulp-sdk
  ☆122Updated 2 months ago
• sumilao / Zynq-7000-DPU-TRD
  Zynq-7000 DPU TRD
  ☆47Updated 6 years ago
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆180Updated 6 years ago
• suoglu / Fixed-Floating-Point-Adder-Multiplier
  16-bit Adder Multiplier hardware on Digilent Basys 3
  ☆83Updated 2 years ago
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆85Updated 2 years ago
• cathalmccabe / PYNQ_tutorials
  ☆104Updated 2 years ago
• ac-optimus / Convolution-using-systolic-arrays
  ☆72Updated 7 years ago
• pulp-platform / ne16
  Neural Engine, 16 input channels
  ☆16Updated 3 years ago
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆241Updated 4 months ago
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆102Updated 2 weeks ago
• chenhaoc / cnnhwpe
  ☆66Updated 3 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆106Updated last year
• Xilinx / Vitis_Embedded_Platform_Source
  ☆137Updated last month
• vrishbhan / Matrix-Multiplication
  Design for 4 x 4 Matrix Multiplication using Verilog
  ☆35Updated 10 years ago
• ntampouratzis / FPGA-based-LSTM
  A novel FPGA-based intent recognition systemutilizing deep recurrent neural networks
  ☆27Updated 4 years ago
• hlslibs / hls_tutorials
  Tutorials on HLS Design
  ☆52Updated 6 years ago
• markcxli / FPGA_DPU
  This project is to implement YOLO v3 on Xilinx FPGA with DPU
  ☆63Updated 6 years ago
• yuyuranium / FPGA-Project-2022-simple-tpu
  Systolic array based simple TPU for CNN on PYNQ-Z2
  ☆41Updated 3 years ago