Alternatives and similar repositories for SPI-Interface

Users that are interested in SPI-Interface are comparing it to the libraries listed below

• Siddhi-95 / AHB-to-APB-Bridge-Verification
  Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.
  ☆102Updated 2 years ago
• muneebullashariff / axi4_vip
  Verification IP for APB protocol
  ☆72Updated 5 years ago
• gupta409 / Processor-UVM-Verification
  System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment
  ☆114Updated 11 months ago
• akzare / Async_FIFO_Verification
  Presents a verification use case for a typical Asynchronous FIFO based on Systemverilog and UVM.
  ☆58Updated 5 years ago
• darthsider / UART
  UART design in SV and verification using UVM and SV
  ☆51Updated 6 years ago
• muneebullashariff / i2c_vip
  Verification IP for I2C protocol
  ☆50Updated 4 years ago
• marcoz001 / axi-uvm
  yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/
  ☆134Updated 8 years ago
• JoseIuri / UVM-APB_RAL
  This repository contains an example of the use of UVM Register Abstraction Layer in a verification of a simple APB DUT.
  ☆48Updated 5 years ago
• seabeam / yuu_ahb
  UVM AHB VIP
  ☆90Updated 3 months ago
• techvinodreddy / UART-IP-CORE16550A-Verification-UVM
  The UART (Universal Asynchronous Receiver/Transmitter) core provides serial communication capabilities, which allow communication with a …
  ☆18Updated 4 years ago
• mayurkubavat / UVM-Examples
  UVM examples and projects
  ☆151Updated 5 months ago
• kkenshin1 / AXI-Ethernet-UVM
  A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM
  ☆27Updated 3 years ago
• VimfulDang / APB-SPI-Controller-Verification
  UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC2…
  ☆16Updated last year
• Ghonimo / Pre_Silicon-AHB-to_APB-Verification
  Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀
  ☆42Updated last year
• kumarrishav14 / AXI
  VIP for AXI Protocol
  ☆160Updated 3 years ago
• dadongshangu / async_FIFO
  This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…
  ☆64Updated 2 years ago
• nelsoncsc / ISP_UVM
  A Framework for Design and Verification of Image Processing Applications using UVM
  ☆115Updated 8 years ago
• Travissss / ahb2apb-bridge
  An uvm verification env for ahb2apb bridge
  ☆56Updated 4 years ago
• GodelMachine / AHB2
  AMBA AHB 2.0 VIP in SystemVerilog UVM
  ☆156Updated 5 years ago
• shubhi704 / APB-Protocol
  ☆52Updated 4 years ago
• Lampro-Mellon / apb-uart-uvm-env
  ☆46Updated 2 years ago
• yuravg / uvm_tb_cross_bar
  SystemVerilog UVM testbench example
  ☆37Updated last year
• prajwalgekkouga / AHB-to-APB-Bridge
  The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…
  ☆71Updated 3 years ago
• deekshithkrishnegowda / AHB2APB-bridge-IP-core-verification
  Maven Silicon Project
  ☆19Updated 7 years ago
• avashist003 / UVM_Verification
  Advance UVM testbench with DPI integration, Assertions, Functional Coverage andHierarchical Sequence
  ☆37Updated 5 years ago
• amiq-consulting / amiq_apb
  SystemVerilog VIP for AMBA APB protocol
  ☆81Updated 4 years ago
• wenxuan-hu / SSRL_work
  work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework
  ☆36Updated 3 years ago
• mgtm98 / pcie5_phy
  PCIE 5.0 Graduation project (Verification Team)
  ☆93Updated last year
• MushroomZQ / RISC_VERIF_DEMO_0
  a very simple risc_cpu verification demo with uvm
  ☆26Updated 6 years ago
• designsolver / ahb3_uvm_tb
  AMBA 3 AHB UVM TB
  ☆34Updated 6 years ago