Kholoud-Ebrahim / SPI_ProtocolLinks
UVM based Verification of SPI_Protocol. A Serial intra System Communication Peripheral Protocol.
☆10Updated last year
Alternatives and similar repositories for SPI_Protocol
Users that are interested in SPI_Protocol are comparing it to the libraries listed below
Sorting:
- ☆48Updated 4 years ago
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆25Updated last month
- Architectural design of data router in verilog☆30Updated 5 years ago
- System Verilog using Functional Verification☆12Updated last year
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆98Updated 2 years ago
- ☆10Updated last year
- UVM Testbench to verify serial transmission of data between SPI master and slave☆50Updated 5 years ago
- Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀☆34Updated last year
- The UART (Universal Asynchronous Receiver/Transmitter) core provides serial communication capabilities, which allow communication with a …☆17Updated 4 years ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆65Updated 3 years ago
- I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.☆24Updated 2 years ago
- This course walks you through the Linux OS commands and usage.☆19Updated 3 years ago
- UVM examples and projects☆145Updated 3 months ago
- SystemVerilog VIP for AMBA APB protocol☆79Updated 3 years ago
- ☆17Updated last year
- Examples and reference for System Verilog Assertions☆88Updated 8 years ago
- VIP for AXI Protocol☆153Updated 3 years ago
- System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment☆108Updated 9 months ago
- AMBA AHB 2.0 VIP in SystemVerilog UVM☆155Updated 5 years ago
- yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/☆128Updated 7 years ago
- UVM agents☆83Updated 8 years ago
- Describes the best coding practices and guidelines☆11Updated last year
- Verification IP for APB protocol☆70Updated 4 years ago
- A basic testbench made for educational purposes using SystemVerilog and the Universal Verification Methodology☆109Updated 11 years ago
- This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…☆64Updated last year
- ☆42Updated 2 years ago
- Synchronous FIFO Testbench☆11Updated 3 years ago
- I2C Accelerated VIP☆14Updated 9 months ago
- Advance UVM testbench with DPI integration, Assertions, Functional Coverage andHierarchical Sequence☆37Updated 5 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆130Updated 4 years ago