Alternatives and similar repositories for ZYBO-PYNQ:

Users that are interested in ZYBO-PYNQ are comparing it to the libraries listed below

• AEW2015 / PYNQ_PR_Overlay
  Adding PR to the PYNQ Overlay
  ☆17Updated 7 years ago
• andrewandrepowell / zybo_petalinux
  Small projects intended to run on the Digilent Zybo development board, utilizing PetaLinux on the Zynq's ARM processor.
  ☆20Updated 8 years ago
• Digilent / Petalinux-Zybo
  ☆26Updated 6 years ago
• pbridd / lzrw1-compression-core
  This is the repository for a verilog implementation of a lzrw1 compression core
  ☆18Updated 7 years ago
• adki / RTL-Design-For-FPGA
  Engineering Program on RTL Design for FPGA Accelerator
  ☆26Updated 4 years ago
• rbarzic / nanorv32
  A small 32-bit implementation of the RISC-V architecture
  ☆32Updated 4 years ago
• amichai-bd / riscv-multi-core-lotr
  RISCV core RV32I/E.4 threads in a ring architecture
  ☆30Updated last year
• gtaylormb / ultra96v2_imx219_to_displayport
  Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL
  ☆69Updated 2 years ago
• SeanZarzycki / openSPARC-FPU
  ASIC Design of the openSPARC Floating Point Unit
  ☆13Updated 7 years ago
• jerry-D / 64-bit-Universal-Floating-Point-ISA-Compute-Engine
  RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine
  ☆22Updated 2 years ago
• oprecomp / DDR4_controller
  ☆50Updated 3 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆29Updated 8 years ago
• pkorolov / zynq-fpga
  RISC-V Rocket on the Digilent Zybo Board
  ☆20Updated 10 years ago
• watz0n / arty_xjtag
  Xilinx JTAG Toolchain on Digilent Arty board
  ☆16Updated 6 years ago
• Angelic47 / GowinDDR3_AXI4_SpinalHDL
  Gowin DDR3 Controller with AXI4 Implementation | 高云DDR3内存控制器AXI4接口实现
  ☆21Updated 10 months ago
• CospanDesign / python-pci
  Python interface to PCIE
  ☆38Updated 6 years ago
• altuSemi / PYNQ4Zybo
  Instructions and packages for Zybo compatibility to Pynq
  ☆14Updated 6 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆70Updated 7 months ago
• Efinix-Inc / evsoc
  This repo is for Edge Vision SoC framework, which facilitates quick porting of users' design for Edge AI and Vision solutions.
  ☆22Updated last year
• FPGA-Research / eFPGA---RTL-to-GDS-with-SKY130
  This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk
  ☆27Updated 3 years ago
• ben-marshall / croyde-riscv
  A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.
  ☆44Updated 3 years ago
• freecores / uart16550
  UART 16550 core
  ☆32Updated 10 years ago
• ATaylorCEngFIET / Genesys_ZU_MIPI_PCAM
  Imaging application using MIPI and DisplayPort to process image
  ☆23Updated 4 years ago
• freecores / wb_dma
  WISHBONE DMA/Bridge IP Core
  ☆18Updated 10 years ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆100Updated 4 years ago
• openasic-org / xkDLA
  xkDLA：XinKai Deep Learning Accelerator (RTL)
  ☆26Updated last year
• Kampi / Zybo-Linux
  A complete Linux project for the ZYBO. This project helps me during my first steps with embedded Linux. You can find anything necessary t…
  ☆12Updated 4 years ago
• byuccl / BYU_PYNQ_PR_Video_Pipeline
  The Demo that was presented at FCCM.
  ☆14Updated 6 years ago
• ucb-bar / nvdla-wrapper
  Wraps the NVDLA project for Chipyard integration
  ☆19Updated 10 months ago
• freecores / double_fpu
  double_fpu_verilog
  ☆14Updated 10 years ago