☆37May 29, 2021Updated 4 years ago
Alternatives and similar repositories for FPGA_network
Users that are interested in FPGA_network are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 本项目使用 Vivado 和 SDK 工程软件上完成系统设计和生成相关部署文件，并在 ARM＋FPGA 完成项目部署，实现通过摄取图片并通过 ARM＋FPGA 综合部署和加速识别算法，并通过显示驱动，在显示屏上显示摄像头原图和识别结果。☆10Aug 12, 2022Updated 3 years ago
- FPGA-CNN Application for fruit detection based on Logos-PGL22G Board☆14Aug 24, 2022Updated 3 years ago
- FPGA实现动态图像识别☆23Jul 31, 2020Updated 5 years ago
- Our project is the system that enables a moving camera to track a moving object in real time. We plan on doing this by having a camera m…☆35Dec 10, 2013Updated 12 years ago
- 使用verilog实现流水线 FFT☆15Jul 1, 2024Updated last year
- some interesting demos for starters☆94Dec 2, 2022Updated 3 years ago
- Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database☆579Feb 19, 2021Updated 5 years ago
- Codes to implement MobileNet V2 in a FPGA☆30Dec 21, 2020Updated 5 years ago
- PointPillars TensorRT version pretrained on MMDetection3d with WaymoOpenDataset☆22Aug 11, 2022Updated 3 years ago
- OpenExSys_NoC a mesh-based network on chip IP.☆20Dec 1, 2023Updated 2 years ago
- [AAAI 2025] OLiDM: Object-aware LiDAR Diffusion Models for Autonomous Driving☆22Dec 24, 2024Updated last year
- ECE563 Final Project - FPGA based camera tracking☆18Dec 17, 2013Updated 12 years ago
- Generator of verilog description for FPGA MobileNet implementation☆184Jun 23, 2022Updated 3 years ago
- Verilog Implementation of 32-bit Floating Point Adder☆47May 4, 2020Updated 5 years ago
- OpenExSys_CoherentCache a directory-based MESI protocol coherent cache IP.☆22Mar 25, 2025Updated 11 months ago
- This repository contains code and pdf tutorial of how I've implemented binocular camera matching algorithm, SGBM, with FPGA using verilog…☆36Mar 1, 2023Updated 3 years ago
- Zynq/FPGA实现CNN手写数字(0-9)识别☆38Dec 14, 2024Updated last year
- YOLO example implementation using Intuitus CNN accelerator on ZYBO ZYNQ-7000 FPGA board☆22Jul 30, 2021Updated 4 years ago
- Software and Hardware models of Approximate Carry-Lookahead Adder with Intelligent Carry Judgement and Correction☆12Apr 21, 2022Updated 3 years ago
- In this repository, the RTL design and verification of the axi2apb bridge communication protocol are realized. In this system, the prefer…☆20Apr 11, 2022Updated 3 years ago
- This repository contains the source codes for Side-information-Aided Beam Alignment (SANBA) algorithm for MmWave systems. Both numerical …☆16Oct 1, 2019Updated 6 years ago
- 一个基于AXI接口的PL端卷积加速器，可由PS端调用☆12Apr 15, 2023Updated 2 years ago
- Kratos: An FPGA Benchmark for Unrolled Deep Neural Networks with Fine-Grained Sparsity and Mixed Precision☆12Jan 19, 2026Updated 2 months ago
- implementation in verilog rtl for an FPGA to detect the presence of a face in an image☆11Mar 12, 2021Updated 5 years ago
- ☆10Nov 22, 2022Updated 3 years ago
- The DDR Test Firmware for LicheeTang20K.☆17Jun 20, 2023Updated 2 years ago
- yolov5-acceleration-fpga☆11Jun 25, 2025Updated 8 months ago
- Official Repo for "Multi-objective Differentiable Neural Architecture Search"☆15Jul 12, 2024Updated last year
- 8051 core☆112Jul 17, 2014Updated 11 years ago
- RTL code for AXI4 Interconnect (Verilog). Supports weighted round-robin arbitration, n-channel master, 4Kb splitting, reorder transaction…☆26Mar 13, 2025Updated last year
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆42Mar 17, 2022Updated 4 years ago
- ☆13Jul 10, 2024Updated last year
- Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核☆27Dec 17, 2022Updated 3 years ago
- data preprocessing scripts for gem5 output☆19May 23, 2025Updated 10 months ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆183Apr 10, 2023Updated 2 years ago
- ☆13Jun 4, 2020Updated 5 years ago
- Use Matlab to simulate in LT Spice, acquire results and plot☆18Oct 22, 2020Updated 5 years ago
- FPGA implementation of Semi Global Matching algorithm, using High Level Synthesis☆18Dec 8, 2022Updated 3 years ago
- FPGA☆159Jun 29, 2024Updated last year