spcl / stencilflow

Related projects ⓘ

Alternatives and complementary repositories for stencilflow

• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆23Updated this week
• CMU-SAFARI / SPARTA
  A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…
  ☆19Updated last year
• Xilinx / ACCL
  Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
  ☆81Updated last month
• CMU-SAFARI / SparseP
  SparseP is the first open-source Sparse Matrix Vector Multiplication (SpMV) software package for real-world Processing-In-Memory (PIM) ar…
  ☆70Updated 2 years ago
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆29Updated last year
• Blaok / tapa
  TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…
  ☆19Updated 2 months ago
• spcl / SMI
  Streaming Message Interface: High-Performance Distributed Memory Programming on Reconfigurable Hardware
  ☆16Updated 2 years ago
• cornell-zhang / UniSparse
  Code base for OOPSLA'24 paper: UniSparse: An Intermediate Language for General Sparse Format Customization
  ☆28Updated last week
• he-actlab / polymath
  ☆19Updated last year
• Xilinx / xacc
  Heterogeneous Accelerated Computed Cluster (HACC) Resources Page
  ☆19Updated this week
• zhguanw / lin-analyzer
  A high-level performance analysis tool for FPGA-based accelerators
  ☆18Updated 7 years ago
• argonne-lcf / AIaccelerators-SC23-tutorial
  AI Accelerators-SC23-tutorial Repository
  ☆11Updated last year
• spcl / FBLAS
  BLAS implementation for Intel FPGA
  ☆76Updated 4 years ago
• cornell-zhang / hcl-dialect
  HeteroCL-MLIR dialect for accelerator design
  ☆40Updated 2 months ago
• spcl / mlir-dace
  Data-Centric MLIR dialect
  ☆38Updated last year
• pc2 / HPCC_FPGA
  A OpenCL-based FPGA benchmark suite for HPC
  ☆32Updated 2 weeks ago
• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆56Updated 3 months ago
• cucapra / EventQueue
  EQueue Dialect
  ☆39Updated 2 years ago
• dovedevic / blimp
  A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.
  ☆16Updated 2 years ago
• template-hls / template-hls-float
  ☆27Updated 5 years ago
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆37Updated 3 months ago
• IntelLabs / t2sp
  Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)
  ☆29Updated 6 months ago
• OCT-FPGA / OCT-Tutorials
  ☆25Updated last month
• UCLA-VAST / soda-compiler
  Stencil with Optimized Dataflow Architecture Compiler
  ☆16Updated 4 years ago
• UCLA-VAST / heterohalide
  HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration
  ☆15Updated 4 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆44Updated 2 years ago
• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆49Updated last year
• hpc-ulisboa / NDPmulator
  A Full-System Framework for Simulating NDP devices from Caches to DRAM
  ☆14Updated 10 months ago
• Blaok / fpga-runtime
  ☆11Updated 3 months ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆29Updated 2 years ago