custom-computing-ic / dfe-snippetsLinks
MaxJ and C/C++ library and utilities for Maxeler Dataflow Engines
☆13Updated 7 years ago
Alternatives and similar repositories for dfe-snippets
Users that are interested in dfe-snippets are comparing it to the libraries listed below
Sorting:
- The OpenDwarfs project provides a benchmark suite consisting of different computation/communication idioms, i.e., dwarfs, for state-of-ar…☆100Updated 6 years ago
- NAS Parallel Benchmarks 3.0 OpenMP C version☆54Updated 11 years ago
- SST Structural Simulation Toolkit Parallel Discrete Event Core and Services☆192Updated last week
- Rodinia benchmark☆200Updated 2 years ago
- Reference workloads for modern deep learning methods.☆73Updated 3 years ago
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆164Updated 2 months ago
- A generic test bench written in Bluespec☆57Updated 5 years ago
- Single-source shortest paths accelerated with AWS F1 FPGA☆14Updated 7 years ago
- A GPU cache model for research purposes☆28Updated 12 years ago
- Fork of Hipacc generating code for Vivado HLS and Altera OpenCL☆24Updated 7 years ago
- Bluespec SystemVerilog library for use of the IBM Coherent Accelerator-Processor Interface (CAPI)☆11Updated 9 years ago
- CUDD Decision Diagram Package☆151Updated last month
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆48Updated last year
- DRAMSim2: A cycle accurate DRAM simulator☆294Updated 5 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆52Updated 7 years ago
- Library to plot integer sets and maps☆53Updated 9 years ago
- The Shang high-level synthesis framework☆120Updated 11 years ago
- Barcelona OpenMP Task Suite is a collection of applications that allow to test OpenMP tasking implementations and compare its behaviour u…☆46Updated 6 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆136Updated 5 years ago
- Multi2Sim source code☆134Updated 7 years ago
- ☆48Updated 5 years ago
- Rodinia Benchmark Suite for OpenCL-based FPGAs☆31Updated 2 years ago
- research, experimentation and implementation of hardware-agnostic accelerated DL framework☆38Updated 5 months ago
- HLS branch of Halide☆79Updated 7 years ago
- BLAS implementation for Intel FPGA☆78Updated 5 years ago
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆222Updated 6 years ago
- Benchmarks used in the gpgpu-sim ispass 2009 paper☆31Updated 10 years ago
- Decuda and cudasm, the CUDA binary utilities package. Low-level tools for NVidia G80 GPUs.☆105Updated 15 years ago
- Flexible GPGPU instrumentation☆89Updated 6 years ago
- Memory consistency modelling using Alloy☆31Updated 5 years ago