Alternatives and similar repositories for gem5-RISC-V-FS-Linux

Users that are interested in gem5-RISC-V-FS-Linux are comparing it to the libraries listed below

• poweihuang17 / Documentation_Spike
  Documentation for RISC-V Spike
  ☆102Updated 6 years ago
• openhwgroup / cva6-sdk
  CVA6 SDK containing RISC-V tools and Buildroot
  ☆71Updated last month
• RALC88 / riscv-vectorized-benchmark-suite
  RiVEC Bencmark Suite
  ☆118Updated 8 months ago
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆69Updated last year
• Intensivate / learning-journey
  Chisel Learning Journey
  ☆109Updated 2 years ago
• zero-day-labs / riscv-aia
  AIA IP compliant with the RISC-V AIA spec
  ☆42Updated 6 months ago
• riscv / riscv-CMOs
  ☆89Updated 3 years ago
• riscv-ovpsim / imperas-riscv-tests
  ☆182Updated last year
• sparcians / map
  Modeling Architectural Platform
  ☆196Updated last week
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆101Updated this week
• cnrv / fpga-rocket-chip
  Wrapper for Rocket-Chip on FPGAs
  ☆135Updated 2 years ago
• riscv-software-src / riscv-perf-model
  Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model
  ☆183Updated this week
• ucb-bar / riscv-torture
  RISC-V Torture Test
  ☆195Updated last year
• li3tuo4 / rc-fpga-zcu
  Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)
  ☆62Updated 2 years ago
• chipsalliance / riscv-vector-tests
  Unit tests generator for RVV 1.0
  ☆89Updated 3 weeks ago
• OpenXiangShan / GEM5
  ☆93Updated this week
• ramisheikh / cbp2025
  Championship Branch Prediction 2025
  ☆50Updated 2 months ago
• arm-university / arm-gem5-rsk
  Official repository of the Arm Research Starter Kit on System Modeling using gem5
  ☆116Updated last month
• cnrv / rocket-chip-read
  Comment on the rocket-chip source code
  ☆180Updated 6 years ago
• VerticalResearchGroup / microbench
  Extremely Simple Microbenchmarks
  ☆34Updated 7 years ago
• riscv-boom / fpga-zynq
  Support for Rocket Chip on Zynq FPGAs
  ☆40Updated 6 years ago
• riscv-non-isa / riscv-iommu
  RISC-V IOMMU Specification
  ☆125Updated this week
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆155Updated 3 years ago
• litmus-tests / litmus-tests-riscv
  RISC-V architecture concurrency model litmus tests
  ☆82Updated 2 months ago
• f0rm2l1n / riscv-simulator-guide
  RISC-V模拟器，相关硬件实现`riscv-isa-sim`以及模拟器pk, bbl的指导手册
  ☆53Updated 5 years ago
• agra-uni-bremen / riscv-vp
  RISC-V Virtual Prototype
  ☆172Updated 7 months ago
• seldridge / rocket-rocc-examples
  Tests for example Rocket Custom Coprocessors
  ☆75Updated 5 years ago
• hushenwei2000 / rvv-atg
  RISC-V Vector (RVV) Automatic Tests Generator with full instructions coverage, including self-checking test and signature test (RISC-V Co…
  ☆16Updated last year
• SingularityKChen / SystemC-Training
  SystemC training aimed at TLM.
  ☆31Updated 5 years ago
• OpenXiangShan / xs-env
  XiangShan Frontend Develop Environment
  ☆64Updated this week