Alternatives and similar repositories for valgrind-riscv64

Users that are interested in valgrind-riscv64 are comparing it to the libraries listed below

• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆77Updated this week
• eembc / coremark-pro
  Containing dozens of real-world and synthetic tests, CoreMark®-PRO (2015) is an industry-standard benchmark that measures the multi-proce…
  ☆206Updated last year
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆152Updated last week
• kvm-riscv / linux
  Linux KVM RISC-V repo
  ☆59Updated 2 weeks ago
• kvm-riscv / howto
  KVM RISC-V HowTOs
  ☆47Updated 3 years ago
• luizinhosuraty / pciemu
  PCIe Device Emulation in QEMU
  ☆76Updated 2 years ago
• riscvarchive / riscv-platform-specs
  RISC-V Profiles and Platform Specification
  ☆114Updated 2 years ago
• cnrv / RVSC2023
  RISC-V Summit China 2023
  ☆40Updated last year
• Linaro / OpenCSD
  CoreSight trace stream decoder developed openly
  ☆169Updated 2 months ago
• riscv-non-isa / riscv-uefi
  ☆32Updated 3 years ago
• XUANTIE-RV / xuantie-gnu-toolchain
  GNU toolchain for Xuantie RISC-V CPU, including GCC and Binutils ……
  ☆101Updated 5 months ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆40Updated last year
• jerinjacobk / armv8_pmu_cycle_counter_el0
  ARMv8 performance monitor from userspace
  ☆78Updated 2 years ago
• s094392 / riscv-bare-metal
  A RISC-V bare metal example
  ☆50Updated 3 years ago
• riscv / riscv-profiles
  RISC-V Architecture Profiles
  ☆166Updated 2 weeks ago
• ARM-software / tarmac-trace-utilities
  Tools for analyzing and browsing Tarmac instruction traces.
  ☆76Updated 2 weeks ago
• riscv-non-isa / riscv-security-model
  RISC-V Security Model
  ☆32Updated this week
• zenonxiu81 / arm_system_register_parser
  A python parser for decoding arm aarch32 and aarch64 system registers
  ☆21Updated 2 years ago
• riscvarchive / riscv-binutils-gdb
  RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
  ☆150Updated 3 years ago
• Keith-S-Thompson / dhrystone
  Historical versions of Reinhold P. Weicker's Dhrystone benchmark
  ☆143Updated 13 years ago
• google / aarch64-esr-decoder
  A utility for decoding aarch64 ESR register values.
  ☆96Updated last week
• bao-project / bao-helloworld
  ☆12Updated 2 weeks ago
• XUANTIE-RV / buildroot
  Buildroot customized for Xuantie™ RISC-V CPU
  ☆46Updated 3 years ago
• sifiveinc / freedom-u-sdk
  Freedom U Software Development Kit (FUSDK)
  ☆298Updated 2 months ago
• Xilinx / qemu
  Xilinx's fork of Quick EMUlator (QEMU) with improved support and modelling for the Xilinx platforms.
  ☆270Updated last month
• riscv / riscv-plic-spec
  PLIC Specification
  ☆147Updated 3 weeks ago
• mollybuild / RISCV-Measurement
  This is a repo for recording and reporting RISCV platform's test and measurement continuously.
  ☆59Updated last year
• riscv / riscv-aia
  ☆96Updated 3 weeks ago
• michaeljclark / riscv-probe
  Simple machine mode program to probe RISC-V control and status registers
  ☆125Updated 2 years ago
• riscv / riscv-smmtt
  This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…
  ☆60Updated this week