Alternatives and similar repositories for tarmac-trace-utilities

Users that are interested in tarmac-trace-utilities are comparing it to the libraries listed below

• Xilinx / systemctlm-cosim-demo
  QEMU libsystemctlm-soc co-simulation demos.
  ☆156Updated 5 months ago
• riscvarchive / riscv-CMOs
  ☆89Updated 2 months ago
• riscvarchive / riscv-eabi-spec
  Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.
  ☆27Updated 4 years ago
• machineware-gmbh / vcml
  A modeling library with virtual components for SystemC and TLM simulators
  ☆172Updated last week
• openhwgroup / cva6-sdk
  CVA6 SDK containing RISC-V tools and Buildroot
  ☆75Updated 3 weeks ago
• zero-day-labs / riscv-aia
  AIA IP compliant with the RISC-V AIA spec
  ☆45Updated 9 months ago
• chipsalliance / caliptra-rtl
  HW Design Collateral for Caliptra RoT IP
  ☆115Updated this week
• quic / qbox
  Qbox
  ☆67Updated last week
• agra-uni-bremen / riscv-vp
  RISC-V Virtual Prototype
  ☆179Updated 11 months ago
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆71Updated last year
• riscv-ovpsim / imperas-riscv-tests
  ☆189Updated last year
• riscv-non-isa / tg-nexus-trace
  RISC-V Nexus Trace TG documentation and reference code
  ☆54Updated 10 months ago
• riscvarchive / riscv-aclint
  ☆42Updated 3 years ago
• riscv / riscv-aia
  ☆96Updated 2 months ago
• Xilinx / libsystemctlm-soc
  SystemC/TLM-2.0 Co-simulation framework
  ☆260Updated 5 months ago
• vherdt / riscv-vp
  RISC-V Virtual Prototype
  ☆44Updated 4 years ago
• riscv / riscv-test-env
  ☆50Updated last month
• proteus-core / proteus
  The SpinalHDL design of the Proteus core, an extensible RISC-V core.
  ☆59Updated last week
• s094392 / riscv-bare-metal
  A RISC-V bare metal example
  ☆52Updated 3 years ago
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆106Updated last month
• embench / embench-iot
  The main Embench repository
  ☆293Updated last year
• poweihuang17 / Documentation_Spike
  Documentation for RISC-V Spike
  ☆106Updated 7 years ago
• chipsalliance / dromajo
  RISC-V RV64GC emulator designed for RTL co-simulation
  ☆235Updated 11 months ago
• ppeetteerrs / gem5-RISC-V-FS-Linux
  Repository containing the guide and code for booting RISC-V full system linux using gem5.
  ☆55Updated 4 years ago
• ucb-bar / riscv-torture
  RISC-V Torture Test
  ☆202Updated last year
• Minres / SystemC-Components
  A SystemC productivity library: https://minres.github.io/SystemC-Components/
  ☆124Updated this week
• riscvarchive / riscv-code-size-reduction
  ☆147Updated last year
• chipsalliance / VeeR-ISS
  ☆150Updated 2 years ago
• Arteris-IP / tlm2-interfaces
  contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols
  ☆63Updated 2 weeks ago
• riscv / riscv-plic-spec
  PLIC Specification
  ☆150Updated 2 months ago