XUANTIE-RV / thead-extension-specLinks
XuanTie vendor extension Instruction Set spec
☆42Updated 7 months ago
Alternatives and similar repositories for thead-extension-spec
Users that are interested in thead-extension-spec are comparing it to the libraries listed below
Sorting:
- GNU toolchain for Xuantie RISC-V CPU, including GCC and Binutils ……☆106Updated 8 months ago
- Documentation of the RISC-V C API☆79Updated last week
- ☆32Updated last week
- RISC-V Summit China 2023☆40Updated 2 years ago
- Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.☆39Updated last year
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆61Updated 3 years ago
- ☆34Updated 3 years ago
- Translate RISC-V Vector Assembly from v1.0 to v0.7☆33Updated last year
- ☆89Updated 4 months ago
- ☆98Updated 3 weeks ago
- RISC-V architecture concurrency model litmus tests☆94Updated 7 months ago
- Containing dozens of real-world and synthetic tests, CoreMark®-PRO (2015) is an industry-standard benchmark that measures the multi-proce…☆213Updated last year
- A libgloss replacement for RISC-V that supports HTIF☆43Updated last year
- RISC-V Packed SIMD Extension☆155Updated 2 months ago
- Qemu for Xuantie RISC-V CPU, a generic machine emulator and virtualizer.☆50Updated 5 months ago
- TVM for chips base on Xuantie CPU, an open deep learning compiler stack.☆30Updated last year
- The multi-core cluster of a PULP system.☆110Updated 2 months ago
- RISC-V Nexus Trace TG documentation and reference code☆55Updated last year
- Run Rocket Chip on VCU128☆30Updated 2 months ago
- A tool to convert binary files to COE files 💫☆17Updated last month
- RISC-V Profiles and Platform Specification☆116Updated 2 years ago
- Open-source high-performance non-blocking cache☆92Updated last month
- a clone of POCL that includes RISC-V newlib devices support and Vortex☆49Updated last month
- C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)☆53Updated 5 years ago
- RISC-V GPGPU☆36Updated 5 years ago
- ☆42Updated 3 weeks ago
- An SoC with multiple RISC-V IMA processors.☆19Updated 7 years ago
- RISC-V port of newlib☆103Updated 3 years ago
- PLIC Specification☆150Updated 4 months ago
- A bare-metal application to test specific features of the risc-v hypervisor extension☆43Updated last month