CAN-bus Controller with AXI4-lite Interface
☆18Mar 4, 2025Updated last year
Alternatives and similar repositories for can_axi4lite
Users that are interested in can_axi4lite are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- CAN with Flexible Data-rate IP Core developed at Department of Measurement of FEE CTU☆34Sep 15, 2022Updated 3 years ago
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 8 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Nov 27, 2018Updated 7 years ago
- Verilog IP Cores & Tests☆13May 3, 2018Updated 8 years ago
- ☆13Feb 28, 2016Updated 10 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆20May 16, 2026Updated last week
- Universal Advanced JTAG Debug Interface☆17May 10, 2024Updated 2 years ago
- SocketCAN Linux driver for UAB "Rusoku Technologies" TouCAN USB to CAN bus converter☆10Sep 4, 2021Updated 4 years ago
- Example code in Verilog for the Blackice II FPGA☆33Sep 8, 2019Updated 6 years ago
- AHB Bus lite v3.0☆17Aug 7, 2019Updated 6 years ago
- Very Simple Control Protocol (VSCP) Level 1 Framework☆11May 11, 2026Updated 2 weeks ago
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆20Sep 2, 2023Updated 2 years ago
- TwoCan is an OpenCPN PlugIn for integrating OpenCPN with NMEA2000® networks☆11Jun 23, 2025Updated 11 months ago
- IP Cores that can be used within Vivado☆27May 18, 2021Updated 5 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- VHDL Bypass descriptor controller for Xilinx DMA IP for PCIe☆18Oct 23, 2019Updated 6 years ago
- AMBA bus generator including AXI, AHB, and APB☆123Jul 29, 2021Updated 4 years ago
- WISHBONE Builder☆15Sep 10, 2016Updated 9 years ago
- Personal mirror for adv_debug_sys☆11Aug 23, 2011Updated 14 years ago
- Collection of scripts for Linux kernel development☆13Jun 6, 2024Updated last year
- Open Source SMT Pick and Place Hardware and Software☆12Dec 30, 2024Updated last year
- Simple VM based Kubernetes cluster setup☆10Jun 23, 2018Updated 7 years ago
- General Purpose IO with APB4 interface☆16May 10, 2024Updated 2 years ago
- 一个JPEG有损图像压缩编码器☆13May 22, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Advanced IDE for developing MicroPython app with ESP8266 board☆12Mar 15, 2017Updated 9 years ago
- Qwt MathML Renderer ( see http://qwt.sourceforge.net )☆20Sep 18, 2018Updated 7 years ago
- ☆24Apr 12, 2026Updated last month
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- DTMF Receiver: Logic Synthesis and Physical Design using genus and innovus in 90nm process node☆16Dec 1, 2023Updated 2 years ago
- Mender MCU example running on STM32L4 using Zephyr RTOS☆10Dec 4, 2025Updated 5 months ago
- A multi-threaded microprocessor interleaving as minimum three threads, which is pin-to-pin compatible with pulpino riscy cores☆19Jul 4, 2025Updated 10 months ago
- APB Timer Unit☆14Oct 30, 2025Updated 6 months ago
- [DevOps] vagrant-kubernetes-3-node-cluster-ubuntu-20.04☆11Mar 16, 2026Updated 2 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- MicroPython port to litex FPGA platforms☆41Apr 7, 2020Updated 6 years ago
- An Arduino UNO compatible implementation for the iCE40 FPGAs☆20Oct 7, 2020Updated 5 years ago
- Cryptography accelerator ASIC (for AES128/AES256 and SHA256) using Skywater 130nm process node (build-environment repo).☆11Jan 13, 2021Updated 5 years ago
- ☆12Dec 8, 2017Updated 8 years ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- Graph algorithms and data structures☆17May 30, 2022Updated 3 years ago
- A 32-bit RISC-V processor for mriscv project☆61Jul 17, 2017Updated 8 years ago