Alternatives and similar repositories for synthia:

Users that are interested in synthia are comparing it to the libraries listed below

• andrecp / myhdl_simple_uart
  A very simple UART implementation in MyHDL
  ☆17Updated 10 years ago
• Gordonei / MyHDL-based-FPGA-DSP-Toolflow
  A library for generating Software Defined Radio-intended DSP code for FPGAs that makes use of the MyHDL (www.myhdl.org) Python library. T…
  ☆24Updated 12 years ago
• m-labs / nmigen-soc
  System on Chip toolkit for nMigen
  ☆19Updated 4 years ago
• amaranth-farm / amgen
  command line tool for frequent amaranth HDL tasks (generate sources, show design)
  ☆12Updated 3 years ago
• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆48Updated 2 months ago
• jck / uhdl
  Utilities for MyHDL
  ☆18Updated last year
• devbisme / myhdlpeek
  Monitor and display signal waveforms from your MyHDL/nMigen digital design in a Jupyter notebook.
  ☆40Updated last year
• leviathanch / qtflow
  A Qt5 based free VLSI development tool
  ☆30Updated 6 years ago
• CospanDesign / nysa
  FPGA Development toolset
  ☆20Updated 7 years ago
• JohnDRO / Golirev-IDE
  An online Verilog IDE based on YosysJS.
  ☆24Updated 9 years ago
• stacksmith / fpgasm
  FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)
  ☆53Updated 3 years ago
• parallella / axi-csi-rx
  AXI MIPI CSI2 RX FPGA core and kernel driver
  ☆8Updated 9 years ago
• m-labs / microscope
  Finding the bacteria in rotting FPGA designs.
  ☆13Updated 4 years ago
• ArcaneNibble / project-chibi
  Altera MAX V bitstream documentation -- CLEANUP PENDING
  ☆19Updated 4 years ago
• mmicko / enigmaFPGA
  Enigma in FPGA
  ☆29Updated 5 years ago
• lowRISC / lowrisc-fpga
  Untethered (stand-alone) FPGA implementation of the lowRISC SoC
  ☆54Updated 5 years ago
• ZipCPU / wbfmtx
  A wishbone controlled FM transmitter hack
  ☆21Updated last year
• devbisme / CAT-Board
  The CAT Board is a Raspberry Pi HAT with a Lattice iCE40HX FPGA.
  ☆61Updated last year
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 5 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆39Updated 9 years ago
• cclienti / wavedisp
  Python classes to create agnostic wave files for HDL simulator viewer
  ☆11Updated 5 years ago
• AnttiLukats / ICEd
  Open Hardware for Open Source FPGA Toolchain
  ☆13Updated 9 years ago
• PeraZver / Microwave-Transmitter
  ☆11Updated 7 years ago
• wsong83 / Asynchronous-Verilog-Synthesiser
  Synthesiser for Asynchronous Verilog Language
  ☆19Updated 10 years ago
• pepijndevos / seqpu
  A bit-serial CPU
  ☆18Updated 5 years ago
• CarlosGS / iceDAQ
  Real time data acquisition based on the Lattice ICEstick hardware
  ☆14Updated 7 years ago
• Qucs / qucs-help
  Qucs-Help documentation
  ☆11Updated 6 years ago
• lawrie / saxonsoc-ulx3s-bin
  The binaries for SaxonSoc Linux and other configurations
  ☆17Updated 2 years ago
• FPGAwars / Collection-stdio
  Icestudio collection for standard Input-Output in different devices
  ☆14Updated 9 months ago
• dawsonjon / chips_v
  RISC-V System on Chip Builder
  ☆12Updated 4 years ago