Alternatives and similar repositories for uart_avip

Users that are interested in uart_avip are comparing it to the libraries listed below

• muneeb-mbytes / i2c_avip
  I2C Accelerated VIP
  ☆14Updated 9 months ago
• mbits-mirafra / linux_course
  This course walks you through the Linux OS commands and usage.
  ☆19Updated 3 years ago
• deekshithkrishnegowda / AHB2APB-bridge-IP-core-verification
  Maven Silicon Project
  ☆19Updated 6 years ago
• techvinodreddy / UART-IP-CORE16550A-Verification-UVM
  The UART (Universal Asynchronous Receiver/Transmitter) core provides serial communication capabilities, which allow communication with a …
  ☆17Updated 4 years ago
• Siddhi-95 / AHB-to-APB-Bridge-Verification
  Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.
  ☆98Updated 2 years ago
• JoseIuri / UVM-APB_RAL
  This repository contains an example of the use of UVM Register Abstraction Layer in a verification of a simple APB DUT.
  ☆45Updated 5 years ago
• muneebullashariff / axi4_vip
  Verification IP for APB protocol
  ☆69Updated 4 years ago
• muneebullashariff / apb_vip
  Verification IP for APB protocol
  ☆29Updated 5 years ago
• Anjali-287 / SPI-Interface
  UVM Testbench to verify serial transmission of data between SPI master and slave
  ☆50Updated 5 years ago
• muneeb-mbytes / spi_avip
  SPI protocol Accelerated VIP
  ☆24Updated 3 years ago
• muneeb-mbytes / axi4_avip
  Development of AXI4 Accelerated VIP
  ☆31Updated 2 years ago
• muneebullashariff / i2c_vip
  Verification IP for I2C protocol
  ☆48Updated 4 years ago
• avashist003 / UVM_Verification
  Advance UVM testbench with DPI integration, Assertions, Functional Coverage andHierarchical Sequence
  ☆37Updated 5 years ago
• kkenshin1 / AXI-Ethernet-UVM
  A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM
  ☆26Updated 3 years ago
• designsolver / ahb2apb_bridge_vip
  AHB to APB Bridge VIP
  ☆29Updated 6 years ago
• VimfulDang / APB-SPI-Controller-Verification
  UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC2…
  ☆16Updated 9 months ago
• seabeam / yuu_ahb
  UVM AHB VIP
  ☆87Updated last week
• MushroomZQ / RISC_VERIF_DEMO_0
  a very simple risc_cpu verification demo with uvm
  ☆26Updated 6 years ago
• seabeam / yuu_vip_gen
  UVM VIP architecture generator
  ☆20Updated 5 years ago
• marcoz001 / axi-uvm
  yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/
  ☆127Updated 7 years ago
• muneebullashariff / spi_vip
  Verification IP for SPI protocol
  ☆19Updated 5 years ago
• dadongshangu / async_FIFO
  This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…
  ☆64Updated last year
• shubhi704 / APB-Protocol
  ☆47Updated 4 years ago
• Artityagi123456789 / -100dasofSystemVerilog
  System Verilog using Functional Verification
  ☆12Updated last year
• dpc525 / uvm_tb_gen
  generate UVM testbench using python
  ☆28Updated 7 years ago
• seabeam / yuu_apb
  UVM APB VIP, part of AMBA3&AMBA4 feature supported
  ☆32Updated 5 years ago
• muguang123 / AXI_Verification
  Verification AXI-4 bus standard using UVM and System Verilog
  ☆15Updated 7 years ago
• Lampro-Mellon / apb-uart-uvm-env
  ☆43Updated last year
• akzare / Async_FIFO_Verification
  Presents a verification use case for a typical Asynchronous FIFO based on Systemverilog and UVM.
  ☆55Updated 5 years ago
• ChinnuReddySeelam / 100DaysRTL_Part1_HDL
  ☆10Updated last year