Towards an Automated Triple Modular Redundancy (TMR) EDA flow for Yosys.
☆12Aug 17, 2026Updated 2 months ago
Alternatives and similar repositories for tamara
Users that are interested in tamara are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Fabric generator and CAD tools graphical frontend☆19Oct 6, 2026Updated last month
- ☆16Jun 30, 2025Updated last year
- This project contains Verilog designs and a PCB for the implementation of CSI-2 camera interface to HDMI bridge on a Gatemate FPGA from C…☆21Jul 28, 2025Updated last year
- ☆12Dec 20, 2023Updated 2 years ago
- Low level arithmetic primitives in RTL☆25Apr 3, 2020Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Mirror of tachyon-da cvc Verilog simulator☆59Mar 16, 2026Updated 7 months ago
- Debug waveforms with GDB☆33Nov 12, 2025Updated last year
- LLM-Assisted FPGA Design for Carrier Frequency Offset Estimation☆11Sep 5, 2025Updated last year
- A Risc-V SoC for Tiny Tapeout☆61Updated this week
- A customized copy of OpenOCD able to access the jtagd/jtagserver distributed with Quartus. At present it is restricted to accessing the A…☆12Aug 18, 2025Updated last year
- Tiny Tapeout IHP 26a shuttle using the open source ihp-sg13g2 PDK☆12Apr 1, 2026Updated 7 months ago
- High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model☆34Feb 2, 2026Updated 9 months ago
- RTLMeter benchmark suite☆34Nov 4, 2026Updated last week
- RTL blocks compatible with the Rocket Chip Generator☆17Mar 30, 2025Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆12Dec 3, 2022Updated 3 years ago
- ☆18Updated this week
- A ROHD-based framework for connectivity and assembly of hardware designs.☆14Nov 7, 2026Updated last week
- A simple BLIF (berkeley logic interchange format) parser☆11Dec 11, 2023Updated 2 years ago
- Library of FPGA architectures☆33Nov 2, 2026Updated last week
- Higher level programming in C☆11May 10, 2014Updated 12 years ago
- TinyBasic interpreted by custom microcoded CPU☆13Oct 26, 2026Updated 2 weeks ago
- HDL-first mixed-signal co-simulation: embed ngspice circuits in Verilog through VPI☆78Sep 22, 2026Updated last month
- Hardcaml wrappers for Xilinx memory primitives☆12Jul 10, 2026Updated 4 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Additional resources for simulation and testing of OpenROM that are not included in the OpenRAM repo.☆12May 14, 2025Updated last year
- OpenCL version of Kaktwoos; Mine cacti with 0xA presses☆10Jun 16, 2022Updated 4 years ago
- Hardware transactions library for Amaranth☆32Updated this week
- A Custom STM32 board that runs on a battery with MCP73831 and is easily programmable with USB thanks to the CP2102 USB-to-UART chip.☆14Dec 21, 2023Updated 2 years ago
- ☆32Jan 7, 2025Updated last year
- SystemVerilog design elaborator into word-level netlist form☆256Updated this week
- Open-source CFET standard-cell PDK with backside power delivery and CFlex track-mixing libraries for RTL-to-GDS DTCO.☆16Oct 21, 2026Updated 3 weeks ago
- ☆14Updated this week
- Modelsim QEMU Unicorn integration via the FLI☆16Oct 19, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- PID Demo Repo and Simulation Engine☆10Apr 1, 2025Updated last year
- 👾 Complete Quartus Project for FPGA-based-3D-renderer☆19Jul 13, 2021Updated 5 years ago
- Mirror of the now discontinued ORCA RISC-V processor from VectorBlox.☆11Feb 11, 2020Updated 6 years ago
- ☆12Feb 22, 2024Updated 2 years ago
- RTL-to-GDS: syn -> sta -> pnr -> gds☆15Sep 1, 2026Updated 2 months ago
- Clock Fault Injector - Clock Glitching Attack with Chipwhisperer☆10Dec 26, 2024Updated last year
- A tool to compile your RTL files into GDSII layouts.☆12Sep 9, 2025Updated last year
Are these results useful?