NetSys / irn-vivado-hls
IRN's packet processing logic synthesized using Xilinx Vivado HLS
☆21Updated 6 years ago
Alternatives and similar repositories for irn-vivado-hls:
Users that are interested in irn-vivado-hls are comparing it to the libraries listed below
- An infrastructure for inline acceleration of network applications☆30Updated 3 years ago
- ☆16Updated last year
- ☆44Updated 3 years ago
- A Fast, Scalable and Programmable Packet Scheduler in Hardware☆38Updated 5 years ago
- A Programmable Hardware Architecture for Network Transport Logic☆34Updated 3 years ago
- This is an official GitHub repository for the paper, "Towards timeout-less transport in commodity datacenter networks.".☆15Updated 3 years ago
- ☆13Updated last year
- ☆20Updated 3 years ago
- ☆22Updated 3 years ago
- Benchmark Suite for RDMA Performance Isolation☆36Updated last year
- ☆32Updated 3 years ago
- Flexible, high-performance TCP offload to SmartNICs using fine-grained parallelism☆59Updated 2 years ago
- An Agile Chisel-Based SoC Design Framework☆26Updated 3 years ago
- Artifacts for the "BBQ: A Fast and Scalable Integer Priority Queue for Hardware Packet Scheduling" paper that appears in NSDI '24.☆15Updated 8 months ago
- ☆14Updated 7 years ago
- ☆12Updated 2 years ago
- ☆21Updated 5 months ago
- ns-2.35 patched with ExpressPass☆27Updated 4 years ago
- An Automated Performance Optimization Framework for P4-Programmable SmartNICs☆23Updated last year
- ☆30Updated 9 years ago
- A Network Function (NF) that re-orders packets per flow by buffering packets for a given time.☆23Updated 2 years ago
- ☆16Updated 3 years ago
- Benchmark Test Suite for RDMA Networks☆51Updated last year
- ☆45Updated 2 years ago
- ☆45Updated last year
- ☆23Updated 2 years ago
- ☆20Updated 7 years ago
- FlowBlaze: Stateful Packet Processing in Hardware☆67Updated 2 years ago
- μP4: A framework for programming dataplane of network devices☆30Updated 4 years ago
- Cebinae: Scalable In-network Fairness Augmentation (SIGCOMM 2022)☆21Updated 2 years ago