Alternatives and similar repositories for rv8-bench

Users that are interested in rv8-bench are comparing it to the libraries listed below

• riscv-admin / iopmp
  Group administration repository for Tech: IOPMP Task Group
  ☆13Updated 11 months ago
• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆27Updated 5 months ago
• Penglai-Enclave / Penglai-Enclave
  This is the main repo for Penglai.
  ☆72Updated 2 years ago
• ilebedev / sanctum
  The MIT Sanctum processor top-level project
  ☆31Updated 5 years ago
• mjyan0720 / InvisiSpec-1.0
  Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.
  ☆60Updated 5 years ago
• cwfletcher / stt
  ☆35Updated 4 years ago
• comparch-security / cpu-sec-bench
  Security Test Benchmark for Computer Architectures
  ☆21Updated 2 months ago
• riscvarchive / riscv-tee
  ☆38Updated 3 years ago
• CSL-KU / SpectreGuard
  Data-centric defense mechanism against Spectre attacks. (DAC'19)
  ☆11Updated 6 years ago
• riscv-boom / boom-attacks
  Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)
  ☆67Updated 6 years ago
• mktrm / SecSMT_Artifact
  The artifact for SecSMT paper -- Usenix Security 2022
  ☆30Updated 3 years ago
• draperlaboratory / hope-RIPE
  A port of the RIPE suite to RISC-V.
  ☆29Updated 7 years ago
• dskarlatos / MicroScope
  Microscope: Enabling Microarchitectural Replay Attacks
  ☆20Updated 5 years ago
• CTSRD-CHERI / Test-Suite-Transient-Execution
  Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly
  ☆17Updated 4 years ago
• riscvarchive / security
  RISC-V Security HC admin repo
  ☆18Updated 10 months ago
• gururaj-s / cleanupspec
  CleanupSpec (MICRO-2019)
  ☆16Updated 5 years ago
• riscv / riscv-spmp
  The repo contains the SPMP architectural specification, which includes capabilities like access control of read/write/execute requests by…
  ☆21Updated last week
• MATCHA-MIT / Pensieve
  This repository provides Pensieve, a security evaluation framework for microarchitectural defenses against speculative execution attacks.
  ☆24Updated last year
• Penglai-Enclave / Penglai-Enclave-TVM
  The main repo of Penglai Enclave based on RISC-V Trapped Virtual Memory (TVM).
  ☆41Updated 2 years ago
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆73Updated 3 weeks ago
• renxida / iseedeaduops-poc
  Proof-of-concept for I See Dead Micro-Ops transient execution attack
  ☆14Updated 4 years ago
• compsec-snu / specdoctor
  ☆25Updated 2 years ago
• riscv-non-isa / riscv-security-model
  RISC-V Security Model
  ☆33Updated last week
• csail-csg / parsec
  ☆11Updated 5 years ago
• riscv-admin / trusted-computing
  ☆23Updated 2 years ago
• embecosm / mibench
  The MiBench testsuite, extended for use in general embedded environments
  ☆108Updated 13 years ago
• compsec-snu / difuzz-rtl
  ☆100Updated last year
• Compass-All / Raft
  Hardware-assisted Dynamic Information Flow Tracking for Runtime Protection on RISC-V
  ☆11Updated 2 years ago
• cwfletcher / oisa
  Data oblivious ISA prototyped on the RISC-V BOOM processor.
  ☆23Updated 3 years ago
• sectrs-acai / acai
  Protecting Accelerator Execution with Arm Confidential Computing Architecture (USENIX Security 2024)
  ☆26Updated last year