Alternatives and similar repositories for FPGA_CryptoNight_V7

Users that are interested in FPGA_CryptoNight_V7 are comparing it to the libraries listed below

• kangyuzhe666 / zynq7010-pynq-2.5
  蚂蚁S9矿板移植pynq2.5
  ☆36Updated 5 years ago
• pbing / FM_Radio
  Simple mono FM Radio.
  ☆49Updated 9 years ago
• nucleisys / n200-doc
  Deprecated, no longer updated, please change to https://www.nucleisys.com/index.php
  ☆25Updated 4 years ago
• vanbwodonk / ft2232hl-jtag-clone
  Digilent JTAG clone hardware + eeprom firmware (.bin)
  ☆71Updated 3 years ago
• dukelec / cdpga
  FPGA core boards / evaluation boards based on CDCTL hardware
  ☆93Updated 4 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆48Updated 5 years ago
• ultraembedded / core_usb_uart
  USB serial device (CDC-ACM)
  ☆43Updated 5 years ago
• watz0n / arty_xjtag
  Xilinx JTAG Toolchain on Digilent Arty board
  ☆18Updated 7 years ago
• freecores / usb_phy
  USB 1.1 PHY
  ☆11Updated 11 years ago
• CoreyChen922 / sata3_host_controller
  It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
  ☆76Updated last year
• kholia / xvc-esp32
  Wireless JTAG 'cable' for Xilinx FPGAs. This is an 'English fork' of https://github.com/ciniml/xvc-esp32 project.
  ☆126Updated 4 years ago
• codeshaa / 16-bit-HDLC-using-VHDL
  High level Data Link Layer Control (HDLC) Protocol (16 bit) implementation using VHDL hardware description language.
  ☆29Updated 9 years ago
• ptracton / UART_ECHO
  Verilog UART FIFO that will just echo back characters. Useful for testing the communications path.
  ☆13Updated 10 years ago
• yedk / arm_cortex_m0_xillinx
  基于arm cortex-m0内核的xillinx fpga sopc工程项目
  ☆13Updated 6 years ago
• Leungfung / ebaz4205_hw
  ☆79Updated 6 years ago
• regymm / ymmcu-ft2232
  FT2232HL JTAG & UART Downloader
  ☆20Updated 4 years ago
• wuhanstudio / picorv32_tang
  A 32-bit RISC-V SoC on FPGA that supports RT-Thread.
  ☆29Updated 2 years ago
• GOOD-Stuff / FPGA-SPI-Flash
  Various projects of SPI loader module for xilinx fpga
  ☆33Updated 5 years ago
• stnolting / cjtag_bridge
  🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
  ☆25Updated 4 years ago
• freecores / usbhostslave
  USB 1.1 Host and Function IP core
  ☆24Updated 11 years ago
• lulinchen / face_detect_open
  A Voila-Jones face detector hardware implementation
  ☆33Updated 7 years ago
• ultraembedded / core_usb_sniffer
  USB capture IP
  ☆23Updated 5 years ago
• ultraembedded / fpga_test_soc
  A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)
  ☆34Updated 5 years ago
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆48Updated 4 years ago
• gowinsemi / GoAI
  GoAI 2.0 Public Repository
  ☆25Updated 3 years ago
• metro94 / RV-DAP-Plus
  ☆25Updated 4 years ago
• ultraembedded / core_ulpi_wrapper
  ULPI Link Wrapper (USB Phy Interface)
  ☆34Updated 5 years ago
• PulseRain / PulseRain_FP51_MCU
  PulseRain FP51 MCU, with peripherals
  ☆17Updated 7 years ago
• balmerdx / sdio_linux_fpga
  Communication channel from FPGA (Alterra EP4CE10) and Linux (Lichee PI Allwinner V3S)
  ☆28Updated 5 years ago
• Goshik92 / SHA256Hasher
  SHA-256 IP core for ZedBoard (Zynq SoC)
  ☆31Updated 7 years ago