lowRISC / manticoreLinks
☆17Updated 3 years ago
Alternatives and similar repositories for manticore
Users that are interested in manticore are comparing it to the libraries listed below
Sorting:
- Symbolic execution tool for Sail ISA specifications☆85Updated last week
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆92Updated 3 weeks ago
- RISC-V Configuration Structure☆41Updated last year
- CHERI-RISC-V model written in Sail☆66Updated 6 months ago
- CryptOpt: Verified Compilation with Randomized Program Search for Cryptographic Primitives☆65Updated last year
- Security monitor for Keystone Enclave (mirror of riscv-pk). Will be deprecated when openSBI port is ready☆35Updated 4 years ago
- Easy SMT solver interaction☆34Updated 6 months ago
- A low-level intermediate representation for hardware description languages☆28Updated 5 years ago
- I-D that describes the algorithm identifiers for NIST's PQC ML-DSA for use in the Internet X.509 Public Key Infrastructure☆14Updated 3 months ago
- XCrypto: a cryptographic ISE for RISC-V☆92Updated 3 years ago
- rmem public repo☆49Updated 8 months ago
- Testing processors with Random Instruction Generation☆52Updated 3 weeks ago
- Assured confidential execution (ACE) implements VM-based trusted execution environment (TEE) for embedded RISC-V systems with focus on a …☆198Updated this week
- This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…☆64Updated this week
- Fuzzer to automatically find side-channel (timing) vulnerabilities☆123Updated 4 years ago
- [HISTORICAL] FIPS and higher-level algorithm tests for RISC-V Crypto Extension☆29Updated last year
- ☆16Updated last week
- Verification of BPF JIT compilers☆58Updated 2 years ago
- Soft-logic designs and HAL libraries for various subsystems found in Oxide hardware.☆16Updated this week
- [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4☆37Updated 5 years ago
- Assembly super-optimization via constraint solving☆236Updated last week
- This repo contains the artifact for our SOSP'19 paper on Serval☆32Updated 6 years ago
- This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory prot…☆97Updated this week
- A framework for formally verifying hardware security modules to be free of hardware, software, and timing side-channel vulnerabilities 🔏☆40Updated 2 months ago
- Notary: A Device for Secure Transaction Approval 📟☆28Updated last year
- Framework for building transparent memory encryption and authentication solutions☆27Updated 7 years ago
- Risc-V hypervisor for TEE development☆126Updated 3 weeks ago
- ☆22Updated last year
- Rust RISC-V Virtual Machine☆113Updated 5 months ago
- Miralis is a RISC-V firmware that virtualizes RISC-V firmware☆43Updated 3 weeks ago