Alternatives and similar repositories for manticore

Users that are interested in manticore are comparing it to the libraries listed below

• keystone-enclave / riscv-pk
  Security monitor for Keystone Enclave (mirror of riscv-pk). Will be deprecated when openSBI port is ready
  ☆35Updated 4 years ago
• stefanpie / sa-placer
  ☆16Updated last year
• rems-project / isla
  Symbolic execution tool for Sail ISA specifications
  ☆79Updated 2 months ago
• riscv / riscv-cheri
  This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory prot…
  ☆89Updated this week
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆41Updated last year
• rivosinc / salus
  Risc-V hypervisor for TEE development
  ☆125Updated 5 months ago
• CTSRD-CHERI / sail-cheri-riscv
  CHERI-RISC-V model written in Sail
  ☆65Updated 4 months ago
• rems-project / sail-arm
  Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model
  ☆90Updated last week
• IBM / ACE-RISCV
  Assured confidential execution (ACE) implements VM-based trusted execution environment (TEE) for embedded RISC-V systems with focus on a …
  ☆192Updated 2 weeks ago
• riscv / riscv-cfi
  This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. …
  ☆92Updated this week
• anishathalye / notary
  Notary: A Device for Secure Transaction Approval 📟
  ☆28Updated 9 months ago
• 0xADE1A1DE / CryptOpt
  CryptOpt: Verified Compilation with Randomized Program Search for Cryptographic Primitives
  ☆62Updated last year
• CTSRD-CHERI / TestRIG
  Testing processors with Random Instruction Generation
  ☆48Updated last month
• scarv / xcrypto
  XCrypto: a cryptographic ISE for RISC-V
  ☆92Updated 2 years ago
• elliottt / easy-smt
  Easy SMT solver interaction
  ☆34Updated 3 months ago
• nbdd0121 / r2vm
  Rust RISC-V Virtual Machine
  ☆110Updated 2 months ago
• rvkrypto / rvkrypto-fips
  [HISTORICAL] FIPS and higher-level algorithm tests for RISC-V Crypto Extension
  ☆29Updated last year
• CTSRD-CHERI / qemu
  QEMU with support for CHERI
  ☆61Updated this week
• CTSRD-CHERI / cheri-specification
  CHERI ISA Specification
  ☆24Updated last month
• maerhart / llhd
  A low-level intermediate representation for hardware description languages
  ☆28Updated 5 years ago
• Kuree / fsim
  Fiber-based SystemVerilog Simulator.
  ☆25Updated 3 years ago
• isec-tugraz / memsec
  Framework for building transparent memory encryption and authentication solutions
  ☆27Updated 7 years ago
• rust-vmm / vm-fdt
  ☆19Updated last year
• riscv / riscv-smmtt
  This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…
  ☆64Updated this week
• microwalk-project / Microwalk
  A microarchitectural leakage detection framework using dynamic instrumentation.
  ☆78Updated 4 months ago
• oxidecomputer / quartz
  Soft-logic designs and HAL libraries for various subsystems found in Oxide hardware.
  ☆15Updated this week
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆58Updated 2 weeks ago
• CharlyCst / miralis
  Miralis is a RISC-V firmware that virtualizes RISC-V firmware
  ☆38Updated 2 weeks ago
• lachlansneff / ligeia
  A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.
  ☆19Updated 3 years ago
• uw-unsat / jitterbug
  Verification of BPF JIT compilers
  ☆57Updated 2 years ago