Chinese Translation on <PCI Express Technology Comprehensive Guide to Generations 1.x, 2.x and 3.0> by Mindshare Mindshare
☆385Mar 27, 2023Updated 3 years ago
Alternatives and similar repositories for Chinese-Translation-of-PCI-Express-Technology-
Users that are interested in Chinese-Translation-of-PCI-Express-Technology- are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- PCI_Express总线经典书籍☆122May 13, 2022Updated 4 years ago
- Verilog PCI express components☆1,644Apr 26, 2024Updated 2 years ago
- ☆31Aug 8, 2020Updated 6 years ago
- Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核☆839Sep 14, 2023Updated 2 years ago
- Jude's vimrc for DV work(fine tuning for SV/UVM)☆22Mar 12, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆32Feb 20, 2024Updated 2 years ago
- Open source FPGA-based NIC and platform for in-network compute☆2,425Jul 5, 2024Updated 2 years ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆246Jul 16, 2023Updated 3 years ago
- PCI Express controller model☆80Oct 5, 2022Updated 3 years ago
- The RIFFA development repository☆880Jun 11, 2024Updated 2 years ago
- Chisel NVMe controller☆29Nov 24, 2022Updated 3 years ago
- ☆89Jun 27, 2022Updated 4 years ago
- ☆38Mar 10, 2021Updated 5 years ago
- Module giải mã và đóng gói cho các giao thức IP/TCP+UDP. Viết bằng Verilog. Đề tài thực hiện cho Đồ án thiết kế luận lý.☆15Jan 3, 2022Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- understanding of cocotb (In Chinese Only)☆22Jun 10, 2025Updated last year
- Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board☆18Apr 13, 2022Updated 4 years ago
- Verilog Ethernet components for FPGA implementation☆3,068Feb 27, 2025Updated last year
- ☆244Jun 25, 2025Updated last year
- ☆22Apr 1, 2024Updated 2 years ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,659Aug 5, 2026Updated last week
- NoC based MPSoC☆11Jul 17, 2014Updated 12 years ago
- Novel GUI Based UVM Testbench Template Builder☆156Apr 14, 2021Updated 5 years ago
- 文档编写☆14Sep 19, 2020Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Get Started From Here. The main repo for the whole open-rdma project. Including introduction, hands-on guide, new events and many other t…☆344May 22, 2026Updated 2 months ago
- 在FPGA上实现SRIO收发控制器☆11Sep 30, 2022Updated 3 years ago
- Vivado诸多IP,包括图像处理等☆233Jul 28, 2024Updated 2 years ago
- ☆22May 3, 2026Updated 3 months ago
- Builds and parses PCIe Transport Layer Packets (TLPs)☆45Jul 21, 2022Updated 4 years ago
- Collect some IC textbooks for learning.☆224Aug 11, 2022Updated 4 years ago
- PCIE 5.0 Graduation project (Verification Team)☆108Jan 27, 2024Updated 2 years ago
- Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board☆18Apr 4, 2024Updated 2 years ago
- Complete UCIe v2.0 Controller RTL Implementation with Revolutionary 128 Gbps PAM4 Signaling - Architecture Design Complete, Ready for RTL…☆36Aug 30, 2025Updated 11 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Chisel implementation of Neural Processing Unit for System on the Chip☆34Aug 5, 2026Updated last week
- ☆22May 18, 2018Updated 8 years ago
- Mini RISC-V toolchain for Linux consisting of compiler, simulator and disassembler.☆12Sep 29, 2022Updated 3 years ago
- FPGA纯逻辑实现modbus通信☆27Sep 5, 2022Updated 3 years ago
- Implementation of the PCIe physical layer☆64Jul 11, 2025Updated last year
- 8b/10b is a line code that maps 8-bit words to 10-bit symbols to achieve DC-balance and bounded disparity, which is used for telecommunic…☆12Jun 8, 2021Updated 5 years ago
- Verification of Ethernet Switch System Verilog☆12Oct 21, 2016Updated 9 years ago