Verilog implementation of Bubble Sorter and Odd Even Transposition Sorter.
☆14Nov 22, 2015Updated 10 years ago
Alternatives and similar repositories for Sorting
Users that are interested in Sorting are comparing it to the libraries listed below
Sorting:
- Hardware-accelerated sorting algorithm☆16May 4, 2020Updated 5 years ago
- Implementation of NIPS2023: Unleashing the Full Potential of Product Quantization for Large-Scale Image Retrieva☆11Nov 12, 2024Updated last year
- ☆36Jun 19, 2023Updated 2 years ago
- ☆10Oct 3, 2018Updated 7 years ago
- BlueDBM hw/sw implementation using the bluespecpcie PCIe library☆12Dec 25, 2022Updated 3 years ago
- Animals classification using CNN☆10Aug 29, 2019Updated 6 years ago
- 将邮件中的图片批量保存到PPT中的VBA项目☆12Feb 28, 2021Updated 5 years ago
- SATA SSD simulator from EssenCloud☆11Apr 18, 2017Updated 8 years ago
- A simple script to plot the Roofline model for given HW platforms and applications☆10Aug 22, 2024Updated last year
- TSDG: An efficient index graph for graph-based nearest neighbor search☆10Jul 14, 2022Updated 3 years ago
- Releasing open-sourced version of the code used in the paper "Perceptron-based Prefetch Filtering (ISCA 2019)"☆10May 27, 2022Updated 3 years ago
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆41Mar 1, 2019Updated 7 years ago
- MessagePack implementation for VHDL☆11Nov 29, 2017Updated 8 years ago
- Sample scripts for FPGA-based AI Edge Contest 2019☆11Mar 20, 2020Updated 5 years ago
- Digital Communication Project implemented in MATLAB☆11Aug 23, 2021Updated 4 years ago
- Bose–Chaudhuri–Hocquenghem Codec☆13Feb 18, 2026Updated 2 weeks ago
- A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.☆11Aug 22, 2021Updated 4 years ago
- Benchmarking execution time of AlexNet CNN on FPGA and GPU. Developed AlexNet in opencl.☆11Oct 9, 2019Updated 6 years ago
- ☆11Jan 17, 2024Updated 2 years ago
- ☆10Sep 4, 2017Updated 8 years ago
- Polar Decoder☆12Jan 19, 2023Updated 3 years ago
- This repository integrates gem5 with Ramulator2, allowing gem5 to use Ramulator2 as its DRAM memory model. With the provided materials an…☆13Jun 7, 2025Updated 8 months ago
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆45Jul 28, 2017Updated 8 years ago
- CNN Baseline for Image Compression☆10Nov 11, 2018Updated 7 years ago
- 2D and 3D Matrix Convolution and Matrix Multiplication with CUDA☆10Jun 14, 2021Updated 4 years ago
- Planetoid datasets. Consist of Cora, Pubmed, Citeseer, Large_Cora, nell.0.1, nell.0.01, nell.0.001.☆13Oct 12, 2019Updated 6 years ago
- Hardware and Software Co-design implementations☆15Dec 5, 2019Updated 6 years ago
- Vivado project for the SP701 Imaging application project☆13Apr 1, 2020Updated 5 years ago
- 一些机器学习的实践☆11Jun 29, 2022Updated 3 years ago
- A new DRAM substrate that mitigates the excessive energy consumption from both (i) transmitting unused data on the memory channel and (i…☆13Aug 23, 2024Updated last year
- A SSD-based graph processing engine for billion-node graphs☆12Feb 1, 2015Updated 11 years ago
- ☆14Feb 2, 2026Updated last month
- For OFW 5.05/Для ПО 5.05☆12Mar 18, 2021Updated 4 years ago
- Source code of the processing-in-memory simulator used in the GRIM-Filter paper published at BMC Genomics in 2018: "GRIM-Filter: Fast See…☆11Feb 5, 2018Updated 8 years ago
- Insight@DCU Insight Deep Learning Workshop☆12May 12, 2017Updated 8 years ago
- Arrow Matrix Decomposition - Communication-Efficient Distributed Sparse Matrix Multiplication☆15Mar 25, 2024Updated last year
- A Performance Analysis and Simulation of BCH Code in Matlab☆13Feb 26, 2022Updated 4 years ago
- NeuraChip Accelerator Simulator☆16Apr 26, 2024Updated last year
- Fullsearch based Motion Estimation Processor written in Verilog-HDL☆11Feb 19, 2017Updated 9 years ago