Reverse-engineering tools for FPGA bitstreams, Altera and Xilinx
☆89Jun 10, 2015Updated 10 years ago
Alternatives and similar repositories for debit
Users that are interested in debit are comparing it to the libraries listed below
Sorting:
- Bitfile Interpretation Library for Xilinx Virtex FPGAs☆29Aug 9, 2012Updated 13 years ago
- public domain tools for FPGAs☆332Feb 7, 2017Updated 9 years ago
- Groundhog - Serial ATA Host Bus Adapter☆24Jun 10, 2018Updated 7 years ago
- E300 Development☆11Feb 1, 2024Updated 2 years ago
- PCB layout for my cheap FPGA HDMI experimenting board☆10Aug 21, 2014Updated 11 years ago
- Mining CryptoNight Haven on the Varium C1100☆10Apr 1, 2022Updated 3 years ago
- An Open Source FPGA GroestlCoin Miner☆10Feb 11, 2018Updated 8 years ago
- Documenting the Xilinx 7-series bit-stream format.☆851Jun 5, 2025Updated 9 months ago
- nMigen examples for the ULX3S board☆16Nov 30, 2020Updated 5 years ago
- HeteroSim is a full system simulator supporting x86 multicore processors combined with a FPGA via bus-based architecture. Flexible design…☆21Jul 11, 2016Updated 9 years ago
- Utilities for the ECP5 FPGA☆17Aug 5, 2021Updated 4 years ago
- ☆18May 24, 2021Updated 4 years ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆34Jul 15, 2024Updated last year
- Andy's Workshop Sprite Engine☆46Aug 16, 2014Updated 11 years ago
- Cyclone V bitstream reverse-engineering project☆131Oct 19, 2023Updated 2 years ago
- VHDL Bypass descriptor controller for Xilinx DMA IP for PCIe☆18Oct 23, 2019Updated 6 years ago
- VHDL design for rotary encoder. Can be used accessed via digital signals or AXI interface.☆13Mar 24, 2017Updated 8 years ago
- Torc: Tools for Open Reconfigurable Computing☆39Apr 12, 2017Updated 8 years ago
- Programmer for the Lattice ECP5 series, making use of FTDI based adaptors☆92Nov 7, 2024Updated last year
- Project X-Ray Database: XC7 Series☆74Dec 14, 2021Updated 4 years ago
- Contents from Solaris 8 Source Foundation☆11Oct 11, 2021Updated 4 years ago
- FPGA Additive White Gaussian Noise Generator Using the Box Mueller Method☆11Oct 7, 2016Updated 9 years ago
- HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs☆13Feb 9, 2019Updated 7 years ago
- Miscellaneous IDA scripts and projects☆15Apr 14, 2021Updated 4 years ago
- an sata controller using smallest resource.☆17Feb 5, 2014Updated 12 years ago
- IPDBG☆13Aug 22, 2025Updated 6 months ago
- A Win32 + libusb-1.0 API port of fxload, programming tool for Cypress EZ-USB series.☆10Jun 30, 2015Updated 10 years ago
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 8 years ago
- Repository containing the DSP gateware cores☆14Feb 6, 2026Updated last month
- A Powershell script for signing or adding signatures to tap-windows6 drivers☆10Apr 18, 2019Updated 6 years ago
- SQRL Port of ethminer☆11Feb 1, 2021Updated 5 years ago
- PCB for multisync switch for Atari☆25Mar 25, 2018Updated 7 years ago
- High level Data Link Layer Control (HDLC) Protocol (16 bit) implementation using VHDL hardware description language.☆29Dec 1, 2016Updated 9 years ago
- FPGA 101 - Workshop materials☆79Mar 17, 2019Updated 6 years ago
- A Tcl-based CAD Tool Framework for Xilinx's Vivado Design Suite☆44Oct 21, 2019Updated 6 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Nov 27, 2018Updated 7 years ago
- ☆11Aug 21, 2016Updated 9 years ago
- A subclass of Mike McCauley's excellent AccelStepper library (http://www.airspayce.com/mikem/arduino/AccelStepper) that uses an encoder t…☆11Mar 9, 2014Updated 11 years ago
- Software for Bill Shen's Z280RC Single Board Z280 system on a RC2014 board☆15Nov 17, 2021Updated 4 years ago