intel / FPGA-DevcloudLinks
Get started using Intel® FPGA tools on the Devcloud with tutorials, workshops, advanced courses, and sample projects built specifically for students, researchers, and developers. Visit our official Intel® FPGA Devcloud website:
☆120Updated last year
Alternatives and similar repositories for FPGA-Devcloud
Users that are interested in FPGA-Devcloud are comparing it to the libraries listed below
Sorting:
- ☆126Updated 6 months ago
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated 4 months ago
- ☆119Updated 3 years ago
- ☆33Updated 8 months ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆105Updated last year
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆47Updated 10 months ago
- AMD OpenNIC driver includes the Linux kernel driver☆67Updated 5 months ago
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆269Updated last month
- Tutorials on HLS Design☆51Updated 5 years ago
- 100 Gbps TCP/IP stack for Vitis shells☆209Updated last year
- FOS - FPGA Operating System☆68Updated 4 years ago
- Virtual Platform for NVDLA☆145Updated 6 years ago
- Repository used to support automated builds under PetaLinux tools that use Yocto.☆59Updated 2 months ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆319Updated 4 months ago
- ☆288Updated last week
- AMD Xilinx University Program Vivado tutorial☆40Updated 2 years ago
- For publishing the source for UG1352 "Get Moving with Alveo"☆51Updated 4 years ago
- Board files to build Ultra 96 PYNQ image☆155Updated 5 months ago
- Avnet Board Definition Files☆133Updated last month
- OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology☆68Updated 9 months ago
- Distributed Accelerator OS☆62Updated 3 years ago
- ☆87Updated 2 years ago
- Learn systemC with examples☆112Updated 2 years ago
- VNx: Vitis Network Examples☆149Updated 10 months ago
- SDAccel Development Environment Tutorials☆109Updated 5 years ago
- Rodinia Benchmark Suite for OpenCL-based FPGAs☆31Updated 2 years ago
- A curated list of awesome resources for HDL design and verification☆150Updated last week
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆126Updated 2 years ago
- ☆69Updated 2 months ago