gtxzsxxk / temuLinks
可移植的 RISC-V 解释执行模拟器。模拟了常见的SoC外设,支持运行主线Linux。A portable RISC-V emulator working in instruction-interpreting way. Common SoC peripherals are emulated. Support running mainline Linux.
☆93Updated last year
Alternatives and similar repositories for temu
Users that are interested in temu are comparing it to the libraries listed below
Sorting:
- An exquisite superscalar RV32GC processor.☆164Updated last year
- Official website for Jiachen Project (甲辰计划).☆62Updated this week
- Unofficial guide for ysyx students applying to ShanghaiTech University☆22Updated 10 months ago
- NJU Virtual Board☆297Updated 4 months ago
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆51Updated 3 weeks ago
- The source of my blog.☆55Updated 2 weeks ago
- RISC-V Development Boards Wandering Project. It is part of the Jiachen Project.☆44Updated this week
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆82Updated 2 years ago
- ☆29Updated 11 months ago
- A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …☆119Updated last year
- ☆160Updated 3 weeks ago
- 一生一芯的信息发布和内容网站☆136Updated 2 years ago
- Online judge server for Verilog | verilogoj.ustc.edu.cn☆82Updated last month
- verilog module add prefix script 可用于ysyx项目添加学号☆13Updated last year
- Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.☆182Updated 4 years ago
- Super fast RISC-V ISA emulator for XiangShan processor☆306Updated this week
- CQU Dual Issue Machine☆38Updated last year
- Linux-capable out-of-order superscaler multicore LoongArch32 (LA32 / LA32R) processor.☆32Updated last year
- ☆21Updated 7 months ago
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆40Updated 2 years ago
- ☆40Updated 2 years ago
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆45Updated last year
- Introduction to Computer Systems (II), Spring 2021☆52Updated 4 years ago
- 体系结构研讨 + ysyx高阶大纲 (WIP☆193Updated last year
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated last month
- MIT6.175 & MIT6.375 Study Notes☆45Updated 2 years ago
- A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave☆32Updated 9 months ago
- 适用于龙芯杯团队赛入门选手的应急cache模块☆30Updated last year
- VSH(SHell for Visualizing vcd file)项目为数字波形文件命令行查看器。☆24Updated last month
- ☆20Updated last year