gtxzsxxk / temu
可移植的 RISC-V 解释执行模拟器。模拟了常见的SoC外设,支持运行主线Linux。A portable RISC-V emulator working in instruction-interpreting way. Common SoC peripherals are emulated. Support running mainline Linux.
☆90Updated 7 months ago
Alternatives and similar repositories for temu:
Users that are interested in temu are comparing it to the libraries listed below
- An exquisite superscalar RV32GC processor.☆156Updated 3 months ago
- RISC-V Development Boards Wandering Project. It is part of the Jiachen Project.☆37Updated this week
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆49Updated 6 months ago
- A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …☆116Updated 6 months ago
- Linux-capable out-of-order superscaler multicore LoongArch32 (LA32 / LA32R) processor.☆23Updated 9 months ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆78Updated last year
- Official website for Jiachen Project (甲辰计划).☆55Updated 4 months ago
- ☆162Updated last year
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆39Updated last year
- 体系结构研讨 + ysyx高阶大纲 (WIP☆156Updated 6 months ago
- The source of my blog.☆23Updated this week
- Unofficial guide for ysyx students applying to ShanghaiTech University☆21Updated 2 months ago
- NJU Virtual Board☆274Updated 3 weeks ago
- ☆25Updated 3 months ago
- ☆35Updated last year
- A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave☆31Updated 3 weeks ago
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated last year
- ☆148Updated 2 weeks ago
- QuardStar Tutorial is all you need !☆15Updated 8 months ago
- ☆36Updated last year
- The decoder library for jemu execution and web documentation☆54Updated last year
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆38Updated 9 months ago
- ☆95Updated 5 months ago
- PLCT工具箱☆31Updated 2 years ago
- Port XV6 to K210 board!☆137Updated 3 years ago
- ☆15Updated 10 months ago
- 一生一芯的信息发布和内容网站☆131Updated last year
- "aura" my super-scalar O3 cpu core☆24Updated 11 months ago
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆134Updated 10 months ago
- My knowledge base☆53Updated 2 weeks ago