eml-eda / messy
Messy is an open-source framework that integrates a RISC-V ISS with SystemC-AMS
☆13Updated this week
Alternatives and similar repositories for messy:
Users that are interested in messy are comparing it to the libraries listed below
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆133Updated last week
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆48Updated last week
- A Plug-and-play Lightweight tool for the Inference Optimization of Deep Neural networks☆40Updated last week
- ☆50Updated this week
- PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…☆46Updated last year
- ☆45Updated 2 weeks ago
- A collection of tutorials for the fpgaConvNet framework.☆39Updated 5 months ago
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆30Updated this week
- ☆41Updated 2 weeks ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆46Updated 5 months ago
- Implementation of Microscaling data formats in SystemVerilog.☆14Updated 6 months ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆68Updated 3 years ago
- tpu-systolic-array-weight-stationary☆20Updated 3 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆77Updated 7 months ago
- Open-source of MSD framework☆16Updated last year
- A fast, accurate trace-based simulator for High-Level Synthesis.☆44Updated 2 weeks ago
- An Open-Source Tool for CGRA Accelerators☆58Updated last month
- A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network☆46Updated last week
- ☆11Updated 2 years ago
- Efficient Neural Network Deployment on Heterogenous TinyML Platforms☆14Updated last year
- Efficient Decision tree Ensembles libary for IoT edge nodes☆14Updated last month
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆89Updated 3 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆46Updated this week
- ☆14Updated last year
- An Open-Hardware CGRA for accelerated computation on the edge.☆20Updated 5 months ago
- An Open-Source Tool for CGRA Accelerators☆18Updated 10 months ago
- ☆23Updated 6 months ago
- DaCH: dataflow cache for high-level synthesis.☆16Updated last year
- An HLS based winograd systolic CNN accelerator☆50Updated 3 years ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆36Updated 2 years ago