Alternatives and similar repositories for ipm:

Users that are interested in ipm are comparing it to the libraries listed below

• efabless / caravel_user_project_analog
  ☆45Updated last month
• efabless / volare
  Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs
  ☆64Updated last month
• zeroasiccorp / umi
  Universal Memory Interface (UMI)
  ☆144Updated this week
• chipsalliance / yosys-f4pga-plugins
  Plugins for Yosys developed as part of the F4PGA project.
  ☆83Updated 10 months ago
• greenblat / vlsistuff
  ideas and eda software for vlsi design
  ☆49Updated 2 weeks ago
• efabless / chipignite-resources
  ☆79Updated 2 years ago
• asinghani / open-eda-course
  Curriculum for a university course to teach chip design using open source EDA tools
  ☆61Updated last year
• dan-fritchman / Hdl21
  Hardware Description Library
  ☆79Updated 2 months ago
• tdene / synth_opt_adders
  Prefix tree adder space exploration library
  ☆57Updated 4 months ago
• iic-jku / SKY130_SAR-ADC1
  Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
  ☆39Updated 3 weeks ago
• pulp-platform / svase
  ☆31Updated 2 months ago
• efabless / mpw_precheck
  ☆37Updated last month
• praharshapm / vsdmixedsignalflow
  This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…
  ☆44Updated 4 years ago
• StefanSchippers / xschem_sky130
  XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
  ☆61Updated this week
• AUCOHL / Fault
  A complete open-source design-for-testing (DFT) Solution
  ☆145Updated 5 months ago
• chipsalliance / fpga-tool-perf
  FPGA tool performance profiling
  ☆102Updated last year
• OS-EDA / Course
  Home of the open-source EDA course.
  ☆35Updated 3 weeks ago
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆45Updated 8 months ago
• spider-tronix / Standard-Cell-Characterization
  Open Source tool to build liberty files and for Characterizing Standard Cells.
  ☆25Updated 4 years ago
• efabless / cace
  Circuit Automatic Characterization Engine
  ☆47Updated last month
• vlsiexcellence / Static-Timing-Analysis-Full-Course
  Static Timing Analysis Full Course
  ☆52Updated 2 years ago
• os-fpga / Raptor
  Raptor end-to-end FPGA Compiler and GUI
  ☆76Updated 3 months ago
• hdl / containers
  Building and deploying container images for open source electronic design automation (EDA)
  ☆112Updated 6 months ago
• grayresearch / CX
  Proposed RISC-V Composable Custom Extensions Specification
  ☆70Updated 10 months ago
• antonblanchard / vlsiffra
  Create fast and efficient standard cell based adders, multipliers and multiply-adders.
  ☆111Updated last year
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆65Updated 4 years ago
• pulp-platform / croc
  A PULP SoC for education, easy to understand and extend with a full flow for a physical design.
  ☆67Updated this week
• AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop
  Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
  ☆56Updated 2 years ago
• parallaxsw / OpenSTA
  ☆63Updated this week
• pulp-platform / morty
  A SystemVerilog source file pickler.
  ☆56Updated 5 months ago