Alternatives and similar repositories for COGBT

Users that are interested in COGBT are comparing it to the libraries listed below

• jiegec / cpu-micro-benchmarks
  CPU micro benchmarks
  ☆65Updated 2 weeks ago
• jiegec / kb
  My knowledge base
  ☆72Updated last week
• IPADS-DuVisor / kvm-tutorial
  ☆23Updated 2 years ago
• jiegec / unofficial-loongarch-intrinsics-guide
  Unofficial LoongArch Intrinsics Guide
  ☆62Updated 3 months ago
• KuangjuX / hypocaust-2
  hypocaust-2, a type-1 hypervisor with H extension run on RISC-V machine
  ☆58Updated last year
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆118Updated last year
• TianhuaTao / uCore-SMP
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆32Updated 3 years ago
• loongson-community / docs
  Collection of Loongson products' public documentation
  ☆84Updated this week
• jiegec / cpu
  Microarchitecture diagrams of several CPUs
  ☆43Updated last month
• jiegec / la-inst
  Examine and discover LoongArch instructions
  ☆21Updated 4 months ago
• OS-F-4 / usr-intr
  项目的主仓库
  ☆25Updated 3 years ago
• chyyuu / thoughts
  ☆42Updated 2 years ago
• ksco / rvemu
  A simple and fast RISC-V JIT emulator.
  ☆151Updated last year
• howardlau1999 / yatcpu
  Yet another toy CPU.
  ☆92Updated last year
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• dramforever / opensbi-h
  [No longer active] A fork of OpenSBI, with software-emulated hypervisor extension support
  ☆41Updated 2 months ago
• kernel-cyrus / kernel-tour
  Tiny simple things inside the kernel
  ☆27Updated 5 months ago
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆45Updated last year
• syswonder / hvisor
  safe type-1 Rust Hypervisor for edge devices
  ☆147Updated 2 weeks ago
• Oyami-Srk / RISCV-GDB-Paging
  Paging Debug tool for GDB using python
  ☆13Updated 3 years ago
• Martins3 / Bare-Metal-Binary-Translator
  裸金属二进制翻译器的设计和实现
  ☆46Updated 7 months ago
• kvm-riscv / linux
  Linux KVM RISC-V repo
  ☆59Updated this week
• Martins3 / Martins3.github.io
  Scratchpad about Linux, Compiler and Virtualization
  ☆75Updated last year
• hellollvm / nanpanjiang-project
  由HelloLLVM社区主席邱吉博士发起，联合HelloGCC等技术社区，推出了「南盘江计划」，致力于帮助更多的女性工程师在编译等基础软件领域实现个人职业目标。
  ☆38Updated 4 months ago
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆14Updated 3 years ago
• rustsbi / rustsbi-hifive-unmatched
  RustSBI support on SiFive FU740 board; FU740 is a five-core heterogeneous processor with four SiFive U74 cores, and one SiFive S7 core
  ☆17Updated 2 years ago
• gtxzsxxk / temu
  可移植的 RISC-V 解释执行模拟器。模拟了常见的SoC外设，支持运行主线Linux。A portable RISC-V emulator working in instruction-interpreting way. Common SoC peripherals ar…
  ☆93Updated last year
• rrwhx / LA_EMU
  Loongarch Emulator
  ☆19Updated 8 months ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago
• DCSec / HyperBench
  HyperBench: A Benchmark Suite for Virtualization Capabilities
  ☆31Updated 5 years ago