Alternatives and similar repositories for unofficial-loongarch-intrinsics-guide

Users that are interested in unofficial-loongarch-intrinsics-guide are comparing it to the libraries listed below

• loongson-community / loongarch-opcodes
  LoongArch Opcodes (unofficially compiled list)
  ☆50Updated 8 months ago
• jiegec / la-inst
  Examine and discover LoongArch instructions
  ☆22Updated 6 months ago
• loongson-community / docs
  Archive of Loongson products' public documentation / 龙芯产品公开文档存档
  ☆89Updated 3 weeks ago
• loongson / la-abi-specs
  ☆34Updated last month
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆119Updated last year
• jiegec / kb
  My knowledge base
  ☆76Updated last week
• dramforever / opensbi-h
  [No longer active] A fork of OpenSBI, with software-emulated hypervisor extension support
  ☆42Updated 5 months ago
• loongson / la-asm-manual
  ☆21Updated last year
• cogbt / COGBT
  Compile Optimization Guided Binary Translator (using llvm as infrastructure)
  ☆52Updated last year
• jiegec / SPECCPU2017Harmony
  Run SPEC CPU 2017 benchmark on OpenHarmony/HarmonyOS NEXT
  ☆32Updated 7 months ago
• lat-opensource / lat
  LoongArch Architecture Translator
  ☆218Updated last week
• revyos / revyos
  Yet another Linux Distro for RISC-V!
  ☆77Updated 3 weeks ago
• jiegec / cpu-micro-benchmarks
  CPU micro benchmarks
  ☆74Updated this week
• android-la64 / docs
  ☆21Updated 5 months ago
• xen0n / larva
  PoC LoongArch - RISC-V emulator
  ☆32Updated 2 years ago
• loongson / gcc
  ☆26Updated last year
• jiegec / cpu
  Microarchitecture diagrams of several CPUs
  ☆46Updated last week
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆14Updated 3 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆45Updated last year
• ziyao233 / barv
  RISC-V VM in Bash
  ☆29Updated 9 months ago
• revyos / xuantie-c900-bugs
  Summary of bugs in Xuantie C9XX core design. include C906/C908/C910/C920
  ☆27Updated 6 months ago
• OpenRigil / openrigil-rtl
  Open-source RISC-V cryptographic hardware token, RTL repo
  ☆20Updated 3 years ago
• riscv / riscv-control-transfer-records
  This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…
  ☆23Updated 11 months ago
• loongson-community / areweloongyet
  咱龙了吗？在这里一站式了解 LoongArch 的上游生态建设。 Are we Loong yet? Follow LoongArch upstream work right here right away.
  ☆253Updated this week
• Martins3 / Bare-Metal-Binary-Translator
  裸金属二进制翻译器的设计和实现
  ☆47Updated 9 months ago
• Icenowy / distro-adaptions-of-gpu-drivers
  演讲《GPU 驱动的发行版适配》
  ☆11Updated last year
• rrwhx / LA_EMU
  Loongarch Emulator
  ☆19Updated 10 months ago
• loongson / LoongArch-Documentation
  The documentation for LoongArch.
  ☆272Updated 9 months ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago