Code to evaluate XLATE attacks as well existing cache attacks.
☆31Aug 17, 2018Updated 7 years ago
Alternatives and similar repositories for xlate
Users that are interested in xlate are comparing it to the libraries listed below
Sorting:
- This repository contains examples of Flush+Flush cache attacks☆170Oct 12, 2021Updated 4 years ago
- A flush-reload side channel attack implementation☆56Mar 26, 2022Updated 3 years ago
- MIRAGE (USENIX Security 2021)☆14Nov 8, 2023Updated 2 years ago
- This repository contains source code and experimental data of multiple cache side-channel attacks on Intel x86 architecture.☆57Aug 21, 2019Updated 6 years ago
- Spectre variant 1 exploitation via PRIME+PROBE☆10May 22, 2019Updated 6 years ago
- This repository contains several tools to perform Cache Template Attacks☆165Nov 11, 2025Updated 3 months ago
- Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…☆53Jun 25, 2019Updated 6 years ago
- New Cache implementation using Gem5☆13Apr 2, 2014Updated 11 years ago
- A tool for detecting Spectre vulnerabilities through fuzzing☆46Aug 25, 2021Updated 4 years ago
- ☆198Jun 12, 2024Updated last year
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆28Jun 25, 2025Updated 8 months ago
- ☆48Dec 19, 2018Updated 7 years ago
- Data oblivious ISA prototyped on the RISC-V BOOM processor.☆23Aug 22, 2022Updated 3 years ago
- ☆20Aug 3, 2018Updated 7 years ago
- Streamline Covert Channel Attack (presented in ASPLOS'21)☆22Feb 18, 2021Updated 5 years ago
- Meltdown/Spectre PoC for Windows☆28Mar 21, 2019Updated 6 years ago
- A library and an application to provide migratable primitives for SGX enclaves.☆22Feb 28, 2020Updated 6 years ago
- Automatic detection of speculative information flows☆75Jul 14, 2021Updated 4 years ago
- ☆11Jun 10, 2024Updated last year
- Code repository for the research paper "A Systematic Look at Ciphertext Side Channels on AMD SEV-SNP"☆14May 17, 2022Updated 3 years ago
- Iodine: Verifying Constant-Time Execution of Hardware☆15Mar 29, 2021Updated 4 years ago
- ☆11Oct 28, 2020Updated 5 years ago
- Page Cache Side Channel Attacks (CVE-2019-5489) proof of concept for Linux☆10Oct 2, 2021Updated 4 years ago
- [UNMAINTAINED] Implementation of the FLUSH+RELOAD side channel attack☆63Nov 4, 2017Updated 8 years ago
- Compiler-based tool that protects Intel SGX applications against controlled-channel attacks☆26May 23, 2017Updated 8 years ago
- Tool for testing and finding minimal eviction sets☆108May 6, 2021Updated 4 years ago
- CIPHERH: Automated Detection of Ciphertext Side-channel Vulnerabilities in Cryptographic Implementations☆13Dec 17, 2023Updated 2 years ago
- Simple Encrypted File System for Occlum☆13Oct 29, 2025Updated 4 months ago
- Experimental setup of "Intel MPX explained"☆29Feb 4, 2020Updated 6 years ago
- Implementation of flush + reload attack to extract private key from the GnuPG implementation of RSA.☆11Aug 8, 2019Updated 6 years ago
- Tutorial: Uncovering and mitigating side-channel leakage in Intel SGX enclaves☆55Mar 17, 2025Updated 11 months ago
- Student Starter Code for Secure Hardware Design at MIT☆89Jan 30, 2026Updated last month
- A POSIX Filesystem for Enclaves with a Mechanized Safety Proof☆17Sep 20, 2019Updated 6 years ago
- prime+probe code targeting a given physical address on libgcrypt run in an SGX enclave☆15Dec 6, 2018Updated 7 years ago
- Code for the CCS 2022 paper "Microarchitectural Leakage Templates and Their Application to Cache-Based Side Channels".☆17Oct 17, 2022Updated 3 years ago
- Multilayered, Log-structured Secure Disk (MlsDisk) protects the disk I/O for TEEs☆20Jul 4, 2024Updated last year
- For paper Container-IMA: https://www.usenix.org/system/files/raid2019-luo.pdf☆12Mar 12, 2020Updated 5 years ago
- Cache side-channel attack AES android☆13Sep 6, 2017Updated 8 years ago
- Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly☆17Jun 7, 2021Updated 4 years ago