chinchilla222 / nezha-d1Links
build mainline SBI and Linux for allwinner D1 nezha board
☆10Updated 3 years ago
Alternatives and similar repositories for nezha-d1
Users that are interested in nezha-d1 are comparing it to the libraries listed below
Sorting:
- ☆43Updated 4 years ago
- ☆25Updated 3 years ago
- buildroot fork☆37Updated this week
- AGM bitstream utilities and decoded files from Supra☆43Updated last year
- Opensource embedded controller firmware for sipeed boards.☆39Updated 6 years ago
- M1s_BL808_Linux_SDK☆31Updated 2 years ago
- Wrapper to Sipeed LicheeRV Nezha CM C906 boot0, opensbi, u-boot, kernel with tiny initramfs☆29Updated 3 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38Updated last year
- The demo projects for Allwinner D1 SBC☆24Updated 3 years ago
- Mainline-friendly SPL for D1☆34Updated 2 years ago
- Build scripts for creating a Debian GNU/Linux image for the Lichee RV RISC-V board☆14Updated 9 months ago
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 5 years ago
- Buildroot customized for Xuantie™ RISC-V CPU☆44Updated 3 years ago
- CH552 Dual USB to Serial Bridge.☆78Updated 10 months ago
- Apache NuttX RTOS on 64-bit RISC-V Sophgo SG2000 (T-Head C906 / Milk-V Duo S)☆35Updated this week
- 国产全志平头哥C906 RISC-V DongshanPI-D1s RV64GVC 裸机示例仓库！☆11Updated last year
- ☆24Updated 6 years ago
- USB-Blaster instance on CH55x MCU.☆49Updated 5 years ago
- Load bitstream to AG1K series FPGA using CH552☆12Updated 3 years ago
- WCH CH569 SerDes Reverse Engineering☆26Updated 2 years ago
- A 32bit RISC-V SoC on FPGA (EG4S20) that supports RT-Thread.☆12Updated 4 years ago
- FT2232D emulator☆26Updated 8 months ago
- Collaborative project to create an advanced GPU, with additional features to flesh-out the peripherals for a home-made, DIY computer.☆16Updated 2 years ago
- ☆24Updated 3 years ago
- ☆26Updated 6 years ago
- Deprecated, please use https://github.com/Nuclei-Software/nuclei-sdk☆20Updated 4 years ago
- A baremetal experiment of Allwinner D1, without FEL☆32Updated 2 years ago
- A 32-bit RISC-V SoC on FPGA that supports RT-Thread.☆28Updated last year
- A extremely size-optimized RV32I soft processor for FPGA.☆28Updated 7 years ago
- FPGA 80186 IBM PC compatible system for Altera Cyclone IV (EP4CE15F23/EP4CE55F23)☆22Updated 3 years ago