oscomp / proj23-lightweight-hypervisor
在RISC-V处理器上实现一个轻量级的Hypervisor。
☆12Updated 3 years ago
Related projects ⓘ
Alternatives and complementary repositories for proj23-lightweight-hypervisor
- [AFK] Hardware router in Chisel (THU Network Joint Lab 2020)☆14Updated 4 years ago
- 各类内核的设计思路☆19Updated 3 years ago
- What if everything is a io_uring?☆16Updated 2 years ago
- Paging Debug tool for GDB using python☆13Updated 2 years ago
- A Symmetric Multiprocessing OS Kernel over RISC-V☆30Updated 2 years ago
- 项目的主仓库☆22Updated 2 years ago
- 基于FPGA实现用户态中断硬件机制与优化操作系统内核☆9Updated 10 months ago
- ☆22Updated last year
- ☆13Updated 3 years ago
- User programs for rCore OS☆18Updated 2 years ago
- Skyloft: A General High-Efficient Scheduling Framework in User Space (SOSP 2024)☆22Updated 2 months ago
- 实现和扩展RISC-V SBI运行时,使之能够支持并运行操作系统☆14Updated 2 years ago
- An RISC-V experimental OS☆25Updated last year
- 调试大师:你见过最强的内核调试器☆35Updated 3 years ago
- 快速陷入处理☆32Updated last year
- ☆30Updated last year
- 自嗨虚拟化软件 - 'Enjoy yourself' type-1 hypervisor software☆25Updated 2 years ago
- ☆13Updated last year
- 洛佳的异步内核实验室☆25Updated 3 years ago
- User-mode trap-and-emulate hypervisor for RISC-V☆13Updated 2 years ago
- Hypervisor written in Rust for the RISC-V 1.0 hypervisor extension☆15Updated last month
- 面向可信执行环境的OS。☆12Updated 2 years ago
- 遍历设备树二进制对象☆12Updated 11 months ago
- CCC从2020年清华操作系统夏令营到2021年操作系统比赛结束的一段旅途的日志记录☆20Updated 3 years ago
- Rust support for RISC-V Platform-Level Interrupt Controller☆10Updated 2 years ago
- RustSBI support on SiFive FU740 board; FU740 is a five-core heterogeneous processor with four SiFive U74 cores, and one SiFive S7 core☆17Updated last year
- Simple RISC-V SBI runtime library; designated for supervisor use☆21Updated 10 months ago
- 用Rust语言重新设计与实现xv6☆35Updated 2 years ago
- Writing a hypervisor in Rust☆11Updated 10 months ago