antmicro / renode-test-actionLinks
GitHub Action allowing to run tests in the Renode framework
☆18Updated 2 months ago
Alternatives and similar repositories for renode-test-action
Users that are interested in renode-test-action are comparing it to the libraries listed below
Sorting:
- cocotb extension for nMigen☆17Updated 3 years ago
- sump3 logic analyzer☆24Updated 3 months ago
- A sphinx extension that allows including wavedrom diagrams by using its text-based representation☆37Updated 11 months ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆29Updated 2 years ago
- ☆34Updated 4 years ago
- ☆15Updated 11 months ago
- Set up your GitHub Actions workflow with a OSS CAD Suite☆16Updated last year
- A usable language reference for VHDL that is concise, direct, and easy to understand.☆25Updated last year
- ☆44Updated 5 months ago
- PolarFire SoC Icicle Kit Libero reference design☆39Updated 2 weeks ago
- Python script to transform a VCD file to wavedrom format☆78Updated 2 years ago
- ☆41Updated 5 years ago
- Interface definitions for VHDL-2019.☆26Updated 2 weeks ago
- Specification of the Wishbone SoC Interconnect Architecture☆45Updated 3 years ago
- A minimal LiteX SoC definition for the TinyFPGA BX☆14Updated 6 years ago
- Bare metal embedded software drivers and examples for PolarFire SoC☆22Updated 3 years ago
- A Grako-based parser for IEEE 1149.1 Boundary-Scan Description Language (BSDL) files☆25Updated 4 years ago
- assorted library of utility cores for amaranth HDL☆94Updated 10 months ago
- ElemRV - End-to-end Open-Source RISC-V Microcontroller☆64Updated 2 months ago
- Flip flop setup, hold & metastability explorer tool☆36Updated 2 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆51Updated 2 years ago
- Small footprint and configurable SPI core☆42Updated last month
- A configurable USB 2.0 device core☆31Updated 5 years ago
- sample VCD files☆37Updated 3 weeks ago
- Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL☆48Updated this week
- ☆14Updated last year
- Support files for participating in a Fomu workshop☆166Updated last year
- PolarFire SoC Documentation☆56Updated last week
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆45Updated this week
- Standard and Curated cores, tested and working.☆11Updated 2 years ago