Alternatives and similar repositories for renode-linux-runner-action

Users that are interested in renode-linux-runner-action are comparing it to the libraries listed below

• antmicro / renode-verilator-integration
  This repository contains sample code integrating Renode with Verilator
  ☆19Updated last month
• antmicro / grabthecam
  ☆18Updated last year
• antmicro / protoplaster
  ☆13Updated 2 months ago
• antmicro / tuttest
  A simple Python utility for extracting documentation snippets from tutorials.
  ☆14Updated last year
• stnolting / fpga_torture
  🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
  ☆29Updated 2 years ago
• antmicro / sargraph
  ☆13Updated 10 months ago
• modm-io / lbuild
  lbuild: a generic, modular code generator in Python 3
  ☆38Updated last year
• psychogenic / microcotb
  micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop
  ☆13Updated 2 months ago
• antmicro / pyrav4l2
  Pythonic, Really Awesome V4L2 utility
  ☆20Updated last year
• polarfire-soc / polarfire-soc-bare-metal-examples
  Bare metal example software projects for PolarFire SoC
  ☆34Updated 2 months ago
• SymbiFlow / sphinxcontrib-hdl-diagrams
  Sphinx Extension which generates various types of diagrams from Verilog code.
  ☆60Updated last year
• antmicro / warp-pipe
  ☆15Updated 8 months ago
• m-labs / nmigen-soc
  System on Chip toolkit for nMigen
  ☆19Updated 5 years ago
• bavovanachte / sphinx-wavedrom
  A sphinx extension that allows including wavedrom diagrams by using its text-based representation
  ☆36Updated 8 months ago
• wavedrom / datasheet
  datasheet generator
  ☆28Updated 2 weeks ago
• antmicro / verilator-verification-features-tests
  ☆21Updated this week
• FOSSEE / nghdl
  This repository contain source code for ngspice and ghdl integration
  ☆30Updated 4 months ago
• nobodywasishere / vhdlref
  A usable language reference for VHDL that is concise, direct, and easy to understand.
  ☆25Updated last year
• antmicro / kenning-pipeline-manager
  ☆21Updated last week
• antmicro / zynq-video-board
  Open Hardware carrier board supporting modules with Zynq 7000 All Programmable SoC devices.
  ☆58Updated last year
• zephyrproject-rtos / gsoc-2022-thrift
  Thrift Zephyr Module (GSoC 2022 Project)
  ☆10Updated 2 years ago
• antmicro / renode-test-action
  GitHub Action allowing to run tests in the Renode framework
  ☆18Updated last month
• Isotel / mixedsim
  Hardware Design Tool - Mixed Signal Simulation with Verilog
  ☆78Updated 5 months ago
• litex-hub / zephyr-on-litex-vexriscv
  ☆12Updated 8 months ago
• accellera-official / PySysC
  Public repository for PySysC, (From SC Common Practices Subgroup)
  ☆52Updated last year
• jameshanlon / netlist-paths
  A library and command-line tool for querying a Verilog netlist.
  ☆26Updated 2 years ago
• veripool / dinotrace
  Simulation VCD waveform viewer, using old Motif UI
  ☆26Updated 2 years ago
• QuickLogic-Corp / quicklogic-fpga-toolchain
  Open Source FPGA toolchain and documentation for QuickLogic devices and eFPGA IP
  ☆38Updated 3 years ago
• Wren6991 / OpenDAP
  ☆23Updated 2 years ago
• verilator / verilator_ext_tests
  Extended and external tests for Verilator testing
  ☆16Updated last week