altera-opensource / linux-refdesigns

Related projects ⓘ

Alternatives and complementary repositories for linux-refdesigns

• freecores / turbo8051
  turbo 8051
  ☆28Updated 7 years ago
• freecores / avr_core
  AVR Core
  ☆12Updated 10 years ago
• freecores / wb_builder
  WISHBONE Builder
  ☆13Updated 8 years ago
• PulseRain / Reindeer_Step
  Reindeer Soft CPU for Step CYC10 FPGA board
  ☆27Updated 3 years ago
• Digilent / digilent-apps
  ☆14Updated last year
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆40Updated last month
• OpenAutomationTechnologies / VHDL_IP-Cores
  ☆15Updated 4 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆39Updated 4 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆53Updated last year
• rbarzic / arty-cm0-designstart
  A port of the DesignStart Cortex-M0 system to the Diligentinc Arty board
  ☆12Updated 6 years ago
• roy77 / Cameralink-LPC-FMC-Module
  ☆17Updated 9 years ago
• AnttiLukats / HackaZynq
  Open Source ZYNQ Board
  ☆30Updated 9 years ago
• jlublin / xvcd_server
  Xilinx Virtual Cable server written in python connecting Xilinx with different JTAG adapters
  ☆11Updated 10 years ago
• siorpaes / BareBonesCortexM0
  Extremely basic CortexM0 SoC based on ARM DesignStart Eval
  ☆22Updated 6 years ago
• chiggs / oc_jpegencode
  Fork of OpenCores jpegencode with Cocotb testbench
  ☆42Updated 9 years ago
• sifive / riscv-gnu-toolchain
  GNU toolchain for RISC-V, including GCC
  ☆15Updated last month
• sergachev / spi_mem_programmer
  Small (Q)SPI flash memory programmer in Verilog
  ☆55Updated 2 years ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆50Updated last year
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆22Updated 10 months ago
• www-asics-ws / usb2_dev
  USB 2.0 Device IP Core
  ☆52Updated 7 years ago
• Digilent / u-boot-digilent
  u-boot-xarm from xilinx git repo with Digilent additions
  ☆31Updated 3 months ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆58Updated 5 years ago
• xupsh / Amp-zynq
  Simple AMP Running Linux and Bare-Metal System on Both Zynq SoC Processors
  ☆20Updated 8 years ago
• Efinix-Inc / xyloni
  This repo is for Efinix Xyloni development board users. It has projects and software to get you started working with the board.
  ☆40Updated last year
• CospanDesign / nysa-verilog
  Verilog Repository for GIT
  ☆29Updated 3 years ago
• jsyk / miilink
  Connecting FPGA and MCU using Ethernet RMII
  ☆22Updated 8 years ago
• ZipCPU / s6soc
  CMod-S6 SoC
  ☆36Updated 6 years ago
• mnentwig / busbridge3
  Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency
  ☆19Updated 5 years ago
• antmicro / openssd-nvme
  ☆13Updated 3 years ago