Digilent / u-boot-digilent
u-boot-xarm from xilinx git repo with Digilent additions
☆31Updated 8 months ago
Alternatives and similar repositories for u-boot-digilent:
Users that are interested in u-boot-digilent are comparing it to the libraries listed below
- Linux Repository for digilent boards☆87Updated 4 months ago
- ☆69Updated last month
- Repository used to support automated builds under PetaLinux tools that use Yocto.☆59Updated 2 weeks ago
- Example design for the Ethernet FMC using the hard GEMs of the Zynq☆55Updated 4 months ago
- FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de1…☆161Updated last year
- ☆83Updated 7 years ago
- Yocto Project layer enables AMD Xilinx tools related metadata for MicroBlaze, Zynq, ZynqMP and Versal devices.☆58Updated 2 weeks ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆69Updated 10 months ago
- FPGA reference design for the the Swerv EH1 Core☆71Updated 5 years ago
- ☆14Updated 2 years ago
- ☆111Updated 3 weeks ago
- PCIe DMA Subsystem based on Xilinx XAPP1171☆45Updated last year
- turbo 8051☆29Updated 7 years ago
- The OpenRISC 1000 architectural simulator☆74Updated 7 months ago
- Repo Manifests for the Yocto Project Build System☆32Updated 2 months ago
- Xilinx Soft-IP HDMI Rx/Tx core Linux drivers☆40Updated 5 months ago
- Ethernet MAC 10/100 Mbps☆79Updated 5 years ago
- Linux device tree generator for the Xilinx SDK (Vivado > 2014.1)☆210Updated 5 months ago
- Demonstration of the AXI DMA engine on the ZedBoard☆53Updated 4 years ago
- Official Intel SOCFPGA U-Boot repository. Note: (1) A "RC" labeled branch is for internal active development use and customer early acces…☆107Updated this week
- Generates Makefiles to synthesize, place, and route verilog using Vivado☆96Updated 2 years ago
- DMA enabled Zynq PS-PL communication to implement high throughput data transfer between Linux applications and user IP core.☆39Updated 8 years ago
- This is a wiki and code sharing for ZYNQ☆71Updated 9 years ago
- Collection of Yocto Project layers to enable AMD Xilinx products☆154Updated 2 weeks ago
- ☆21Updated 6 years ago
- meta-petalinux distro layer supporting Xilinx Tools☆89Updated 2 months ago
- SoftCPU/SoC engine-V☆54Updated 3 weeks ago
- Tutorials, scripts and reference designs for the Intel FPGA partial reconfiguration (PR) design flow☆88Updated last month
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆83Updated 4 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆61Updated 6 years ago