SiLab-Bonn / basilLinks
A data acquisition framework in Python and Verilog.
☆42Updated 3 weeks ago
Alternatives and similar repositories for basil
Users that are interested in basil are comparing it to the libraries listed below
Sorting:
- Firmware that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol☆42Updated last week
- A tool for merging the MyHDL workflow with Vivado☆20Updated 5 years ago
- Python/C/RTL cosimulation with Xilinx's xsim simulator☆70Updated 9 months ago
- Audio filtering with pyfda and cocotb☆11Updated 4 years ago
- ☆26Updated last year
- Flip flop setup, hold & metastability explorer tool☆34Updated 2 years ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆60Updated this week
- This repository is no longer maintained. New repository is here(https://github.com/rggen/rggen).☆17Updated 5 years ago
- Xilinx Unisim Library in Verilog☆78Updated 4 years ago
- cryptography ip-cores in vhdl / verilog☆41Updated 4 years ago
- Python script to transform a VCD file to wavedrom format☆77Updated 2 years ago
- IP-core package generator for AXI4/Avalon☆22Updated 6 years ago
- Fork of OpenCores jpegencode with Cocotb testbench☆44Updated 9 years ago
- ☆23Updated 2 months ago
- Library of reusable VHDL components☆28Updated last year
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 5 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆33Updated 4 months ago
- Open-source RHBD (Radiation Hardened by Design) Standard-Cell Library for SKY130☆7Updated last month
- Verification Utilities for MyHDL☆17Updated last year
- ☆28Updated 3 years ago
- An open-source HDL register code generator fast enough to run in real time.☆71Updated this week
- ☆24Updated this week
- Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL☆48Updated this week
- FPGA and Digital ASIC Build System☆74Updated last week
- Extensible FPGA control platform☆62Updated 2 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- This repository is a subset of UVVM with Utility library and BFMs, and is intended as a UVVM starting platform for thos who only need the…☆21Updated 10 months ago
- experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.☆23Updated last year
- Drawio => VHDL and Verilog☆56Updated last year
- hardware library for hwt (= ipcore repo)☆40Updated this week