RobertBaruch / riscv-rebootLinks
☆42Updated 4 years ago
Alternatives and similar repositories for riscv-reboot
Users that are interested in riscv-reboot are comparing it to the libraries listed below
Sorting:
- Graded exercises for nMigen (WIP)☆55Updated 4 years ago
- Example projects/code for the OrangeCrab☆107Updated last year
- Documenting Lattice's 28nm FPGA parts☆145Updated last year
- ☆69Updated 2 years ago
- Minimax: a Compressed-First, Microcoded RISC-V CPU☆222Updated last year
- This repository contains small example designs that can be used with the open source icestorm flow.☆153Updated 4 years ago
- CoreScore☆169Updated 3 weeks ago
- User-friendly explanation of Yosys options☆113Updated 4 years ago
- The Critical Path - a rambly FPGA blog☆50Updated 5 years ago
- List of all links you can try with ULX3S☆106Updated 4 years ago
- USB Serial on the TinyFPGA BX☆136Updated 4 years ago
- Project X-Ray Database: XC7 Series☆73Updated 3 years ago
- Example LED blinking project for your FPGA dev board of choice☆188Updated last month
- A tutorial for using nmigen☆312Updated 4 years ago
- A FPGA core for a simple SDRAM controller.☆123Updated 4 years ago
- FPGA Odysseus with ULX3S☆69Updated 2 years ago
- SymbiFlow WIP changes for Yosys Open SYnthesis Suite☆39Updated last year
- Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)☆258Updated 2 years ago
- System on Chip toolkit for Amaranth HDL☆97Updated last year
- Building a RISC-V processor out of LSI logic☆92Updated 4 years ago
- Doom classic port to lightweight RISC‑V☆101Updated 3 years ago
- Compact FPGA game console☆165Updated 2 years ago
- SoC based on VexRiscv and ICE40 UP5K☆160Updated 8 months ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆92Updated 7 years ago
- 32-bit RISC-V system on chip for iCE40 FPGAs☆312Updated 2 years ago
- A reimplementation of a tiny stack CPU☆85Updated 2 years ago
- Example litex Risc-V SOC and some example code projects in multiple languages.☆70Updated 2 years ago
- Glacial - microcoded RISC-V core designed for low FPGA resource utilization☆87Updated 6 years ago
- Multi-platform nightly builds of open source FPGA tools☆299Updated 4 years ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆70Updated 3 years ago