Alternatives and similar repositories for rvv-rollback

Users that are interested in rvv-rollback are comparing it to the libraries listed below

• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆141Updated this week
• riscvarchive / riscv-CMOs
  ☆89Updated 5 months ago
• ucb-bar / saturn-vectors
  Chisel RISC-V Vector 1.0 Implementation
  ☆129Updated 3 months ago
• brucehoult / rvv_example
  Simple demonstration of using the RISC-V Vector extension
  ☆50Updated last year
• riscv / riscv-p-spec
  RISC-V Packed SIMD Extension
  ☆155Updated last week
• riscv-non-isa / riscv-semihosting
  ☆32Updated this week
• riscv-non-isa / riscv-iommu
  RISC-V IOMMU Specification
  ☆146Updated this week
• riscv / riscv-aia
  ☆99Updated 2 weeks ago
• chipsalliance / riscv-vector-tests
  Unit tests generator for RVV 1.0
  ☆100Updated 2 months ago
• riscv / riscv-profiles
  RISC-V Architecture Profiles
  ☆171Updated this week
• OpenXiangShan / HuanCun
  Open-source high-performance non-blocking cache
  ☆92Updated last month
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆162Updated 3 years ago
• RALC88 / riscv-vectorized-benchmark-suite
  RiVEC Bencmark Suite
  ☆127Updated last year
• ucb-bar / libgloss-htif
  A libgloss replacement for RISC-V that supports HTIF
  ☆43Updated last year
• camel-cdr / rvv-bench-results
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code. (Results)
  ☆44Updated 2 weeks ago
• riscv / riscv-bfloat16
  ☆38Updated last year
• pulp-platform / spatz
  Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.
  ☆135Updated this week
• pulp-platform / pulp-runtime
  Simple runtime for Pulp platforms
  ☆50Updated 2 months ago
• pulp-platform / pulp_cluster
  The multi-core cluster of a PULP system.
  ☆111Updated 3 weeks ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆114Updated 2 years ago
• CTSRD-CHERI / SIMTight
  Synthesisable SIMT-style RISC-V GPGPU
  ☆48Updated 6 months ago
• bluespec / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆183Updated 8 months ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆79Updated last month
• tenstorrent / whisper
  ☆76Updated 2 weeks ago
• plctlab / plct-gem5
  upstream: https://github.com/RALC88/gem5
  ☆33Updated 2 years ago
• litmus-tests / litmus-tests-riscv
  RISC-V architecture concurrency model litmus tests
  ☆97Updated last week
• tenstorrent / riscv-ocelot
  Ocelot: The Berkeley Out-of-Order Machine With V-EXT support
  ☆224Updated 2 weeks ago
• OpenXiangShan / CoupledL2
  Open-source non-blocking L2 cache
  ☆52Updated this week
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆110Updated 4 months ago
• vortexgpgpu / skybox
  Vortex Graphics
  ☆92Updated last year