Alternatives and similar repositories for ethernet_switch

Users that are interested in ethernet_switch are comparing it to the libraries listed below

• FDU-ME-ARC / NVMeCHA
  ☆19Updated 4 years ago
• haifengch / axi_interconnect
  ☆17Updated last month
• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆23Updated 7 years ago
• hellgate202 / crc_calc
  Simple and effective parallel CRC calculator written in synthesizable SystemVerilog
  ☆14Updated 6 years ago
• luinaudt / deparser
  ☆16Updated 3 years ago
• Wissance / QuickSPI
  Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
  ☆22Updated 7 years ago
• chinkwo / FPGA-multiboot
  通过SPI协议实现FPGA multiboot在线升级功能
  ☆11Updated 7 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed3
  DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8
  ☆15Updated 3 years ago
• corundum / verilog-pcie
  Verilog PCI express components
  ☆23Updated 2 years ago
• mcrl / NVMe
  ☆31Updated last year
• antmicro / openssd-nvme
  ☆29Updated 4 years ago
• Jefferyy-Peng / AXI_DMA_CONTROLLER
  ☆11Updated 2 years ago
• corundum / verilog-ethernet
  Verilog Ethernet components for FPGA implementation
  ☆19Updated 2 years ago
• yhqiu16 / OCOWFC
  Open-Channel Open-Way Flash Controller
  ☆17Updated 3 years ago
• esnet / esnet-fpga-library
  ESnet general-purpose FPGA design library.
  ☆13Updated this week
• trivedidvijen / SPI-to-I2C-Protocol-Conversion-Using-Verilog
  SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.
  ☆10Updated 4 years ago
• CospanDesign / vivado-ip-cores
  IP Cores that can be used within Vivado
  ☆26Updated 4 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆66Updated 2 months ago
• antmicro / nvme-verilog-pcie
  ☆73Updated 3 years ago
• Cognoscan / AxiCores
  AXI4-Compatible Verilog Cores, along with some helper modules.
  ☆16Updated 5 years ago
• FPGA-Networking / HyperParser
  ☆35Updated 3 years ago
• donlon / axi-dma-controller
  Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. Work in Progress.
  ☆13Updated 9 months ago
• giuseppedongiovanni / nvme_comp_storage
  Computational Storage Device based on the open source project OpenSSD.
  ☆27Updated 4 years ago
• hpcn-uam / efficient_checksum-offload-engine
  Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…
  ☆18Updated 5 years ago
• lucasbrasilino / net2axis
  Verilog network module. Models network traffic from pcap to AXI-Stream
  ☆23Updated 4 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆29Updated 9 years ago
• DOUDIU / AXIS-AXI4-AXIS
  This project is designed to delay the output of the video stream in AXI-STREAM format.
  ☆11Updated last year
• RTSYork / unvme-zynq
  User Space NVMe Driver (modified for use on Zynq UltraScale+ MPSoC)
  ☆11Updated 6 years ago
• JoseIuri / axi4lite2uart
  This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.
  ☆21Updated 6 years ago
• rsarwar87 / xdma_dsc_byp_cltr
  VHDL Bypass descriptor controller for Xilinx DMA IP for PCIe
  ☆16Updated 5 years ago