Alternatives and similar repositories for awesome-compilers

Users that are interested in awesome-compilers are comparing it to the libraries listed below

• xmpf / awesome-risc-v
  Curated list of awesome resources related with RISC-V
  ☆88Updated 3 years ago
• mikeroyal / LLVM-Guide
  LLVM (Low Level Virtual Machine) Guide. Learn all about the compiler infrastructure, which is designed for compile-time, link-time, run-t…
  ☆176Updated last year
• Jonathan2251 / lbt
  Develop toolchain based on llvm to for Cpu0 processor
  ☆49Updated this week
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆99Updated 3 years ago
• PacktPublishing / LLVM-Code-Generation
  LLVM Code Generation, published by Packt
  ☆168Updated last week
• merledu / nucleusrv
  NucleusRV (rv32-imf) - A 32-bit 5 staged pipelined risc-v core.
  ☆74Updated 3 weeks ago
• noteed / riscv-hello-c
  Bare metal RISC-V hello world in C
  ☆19Updated 6 years ago
• zslwyuan / LLVM-9.0-Learner-Tutorial
  A blog for LLVM(v9.0.0 or v11.0.0) beginner, step by step, with detailed documents and comments. Record the way I learn LLVM and accompli…
  ☆104Updated 3 years ago
• ArchC / ArchC
  A powerful and modern open-source architecture description language.
  ☆42Updated 7 years ago
• openhwgroup / corev-llvm-project
  ☆17Updated last year
• hadibrais / archsim
  A survey on architectural simulators focused on CPU caches.
  ☆16Updated 5 years ago
• ria-jit / ria-jit
  Lightweight and performant dynamic binary translation for RISC–V code on x86–64
  ☆61Updated 4 years ago
• leonardt / verilogAST-cpp
  C++17 implementation of an AST for Verilog code generation
  ☆24Updated 2 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆77Updated last month
• open64-compiler / open64
  open64 compiler
  ☆85Updated last year
• leros-dev / leros
  A Tiny Processor Core
  ☆110Updated last month
• P3109 / Public
  materials available to the public
  ☆27Updated 3 weeks ago
• makslevental / mmlir
  A minimal (really) out-of-tree MLIR example
  ☆44Updated 2 weeks ago
• Apress / modern-arm-assembly-language-programming
  Source Code for 'Modern Arm Assembly Language Programming' by Daniel Kusswurm
  ☆90Updated 3 years ago
• riscv-admin / riscv-ovpsim
  ☆62Updated 4 years ago
• mshockwave / SQLGen
  Generate SQL from TableGen code - This is part of the tutorial "How to write a TableGen backend" in 2021 LLVM Developers' Meeting.
  ☆33Updated 2 years ago
• wpmed92 / shaderpulse
  🚧 A work-in-progress GLSL compiler targeting SPIR-V mlir 🚧
  ☆20Updated 10 months ago
• VerticalResearchGroup / microbench
  Extremely Simple Microbenchmarks
  ☆34Updated 7 years ago
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆156Updated 3 years ago
• sabbaghm / c-ll-verilog
  An LLVM based mini-C to Verilog High-level Synthesis tool
  ☆37Updated 5 months ago
• emanueledelsozzo / awesome-fpga-programming
  An awesome curated list of languages and tools to program FPGAs
  ☆64Updated 3 years ago
• rhysd / toy-riscv-backend
  Toy RISC-V LLVM backend
  ☆29Updated 3 years ago
• AaronNGray / CompilerDesignInC
  Allen Holub's Book 'Compiler Design In C' source code
  ☆38Updated 9 years ago
• jvstech / float-compare-pass
  Fork of LLVM for demonstrating optimization pass development
  ☆30Updated 2 years ago
• llvm / eudsl
  Embedded Universal DSL: a good DSL for us, by us
  ☆44Updated this week