Alternatives and similar repositories for toy-riscv-backend

Users that are interested in toy-riscv-backend are comparing it to the libraries listed below

• Jonathan2251 / lbt
  Develop toolchain based on llvm to for Cpu0 processor
  ☆49Updated this week
• plctlab / llvm-project
  PLCT实验室的 RISC-V V Spec 实现，基于llvm/llvm-project，rkruppe/rvv-llvm 和 https://repo.hca.bsc.es/gitlab/rferrer/llvm-epi-0.8
  ☆162Updated this week
• zslwyuan / LLVM-9.0-Learner-Tutorial
  A blog for LLVM(v9.0.0 or v11.0.0) beginner, step by step, with detailed documents and comments. Record the way I learn LLVM and accompli…
  ☆104Updated 3 years ago
• rhysd / riscv32-cpu-chisel
  Learning how to make RISC-V 32bit CPU with Chisel
  ☆70Updated 3 years ago
• openhwgroup / corev-llvm-project
  ☆17Updated last year
• riscv / riscv-p-spec
  RISC-V Packed SIMD Extension
  ☆150Updated last year
• xiaoyu1998 / llvm-cpu0
  LLVM Backend tutorial Cpu0
  ☆23Updated last year
• frasercrmck / llvm-leg
  ☆110Updated 4 years ago
• ISRC-CAS / c910-llvm
  平头哥玄铁C910的LLVM工具链支持，由PLCT实验室提供，非官方版本
  ☆74Updated 4 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆77Updated last month
• mshockwave / SQLGen
  Generate SQL from TableGen code - This is part of the tutorial "How to write a TableGen backend" in 2021 LLVM Developers' Meeting.
  ☆33Updated 2 years ago
• Lichtso / riscv-llvm-templates
  Code templates to get started experimenting with the RISC-V LLVM toolchain
  ☆14Updated 6 years ago
• Jonathan2251 / lbd
  ☆383Updated last week
• kitbarton / LLVMLoopOptTutorial
  Tutorial for LLVM Dev Conference 2019.
  ☆15Updated 5 years ago
• NodLabs / mlir-examples
  a simple end to end example of taking a ML graph (TF2 / PyTorch) and running it on a device [cpu, gpu]
  ☆35Updated 4 years ago
• ksco / chibicc-riscv
  A fork of chibicc ported to RISC-V assembly.
  ☆41Updated 3 years ago
• iree-org / iree-bare-metal-arm
  Example for running IREE in a bare-metal Arm environment.
  ☆40Updated last month
• vortexgpgpu / pocl
  a clone of POCL that includes RISC-V newlib devices support and Vortex
  ☆45Updated 2 weeks ago
• Enna1 / LLVM-Study-Notes
  Study notes about LLVM. LLVM 学习笔记. Licensed under CC BY-NC-SA 4.0
  ☆146Updated last year
• wzh99 / relay-mlir
  An MLIR-based toy DL compiler for TVM Relay.
  ☆58Updated 2 years ago
• onikiri / onikiri2
  ☆39Updated last year
• Zhao-Dongyu / sgemm_riscv
  This project records the process of optimizing SGEMM (single-precision floating point General Matrix Multiplication) on the riscv platfor…
  ☆23Updated 8 months ago
• lowRISC / riscv-llvm
  RISC-V support for LLVM projects (LLVM, Clang, ...)
  ☆273Updated last year
• XUANTIE-RV / csi-nn2
  An optimized neural network operator library for chips base on Xuantie CPU.
  ☆93Updated last year
• cnrv / RVWC2021-slides
  第一届 RISC-V 中国峰会的幻灯片等资料存放
  ☆38Updated 2 years ago
• riscv / riscv-cfi
  This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. …
  ☆92Updated last month
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆40Updated last year
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆152Updated last week
• PacktPublishing / LLVM-Techniques-Tips-and-Best-Practices-Clang-and-Middle-End-Libraries
  LLVM Techniques, Tips, and Best Practices Clang and Middle-End Libraries, published by Packt
  ☆189Updated 2 years ago
• lac-dcc / llvm-course
  Code examples used for the LAC LLVM course
  ☆131Updated 9 months ago