becomequantum / KryonLinks
代码在这个库里 Code is here
☆52Updated 7 months ago
Alternatives and similar repositories for Kryon
Users that are interested in Kryon are comparing it to the libraries listed below
Sorting:
- The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to rep…☆39Updated last year
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆180Updated 7 months ago
- some interesting demos for starters☆81Updated 2 years ago
- 包含了SOC设计中的通用IP,如外设、总线结构、基础、验证等☆95Updated 2 weeks ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆79Updated 4 years ago
- 帧差法运动目标检测,基于ZYNQ7020☆67Updated 3 years ago
- FPGA实现简单的图像处理算法☆46Updated 2 years ago
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆113Updated last year
- 2023集创赛紫光同创杯一等奖项目☆117Updated last year
- 该作品为2024年FPGA创新设计大赛(上海安路科技赛道)国一作品☆20Updated 5 months ago
- ☆240Updated last year
- FPGA project☆222Updated 3 years ago
- fpga跑sobel识别算法☆36Updated 4 years ago
- ☆37Updated 4 years ago
- image processing based FPGA☆107Updated 3 years ago
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆61Updated last year
- FPGA实现动态图像识别☆22Updated 4 years ago
- General CNN_Accelerator design.卷积神经网络加速器设计。在PYNQ-Z2 FPGA开发板上实现了卷积池化全连接层等硬件加速计算。☆54Updated 3 months ago
- Constrast limited adaptive histogram equlization based on Verilog☆33Updated last year
- 2022年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛紫光同创赛道视频色度亮度提取赛题设计源文件☆33Updated 2 years ago
- MNIST using tensorflow, c++ and fpga (zynq7010)☆25Updated 2 years ago
- FPGA☆155Updated 11 months ago
- ☆44Updated last month
- 基于FPGA进行车牌识别☆77Updated last year
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆48Updated 5 years ago
- The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…☆39Updated last year
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆28Updated 3 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆153Updated 2 years ago
- 基于FPGA的二维卷积识别任务☆23Updated 2 years ago
- 一个开源的FPGA神经网络加速器。☆166Updated last year