Alternatives and similar repositories for rjrouter:

Users that are interested in rjrouter are comparing it to the libraries listed below

• oscomp / proj23-lightweight-hypervisor
  在RISC-V处理器上实现一个轻量级的Hypervisor。
  ☆12Updated 4 years ago
• CircuitCoder / ChannelOS
  What if everything is a io_uring?
  ☆16Updated 2 years ago
• MashPlant / decaf-rs
  Framework of pa code for THU compiler principle course.
  ☆13Updated 5 years ago
• oscomp / proj6-user-level-interrupt
  基于FPGA实现用户态中断硬件机制与优化操作系统内核
  ☆9Updated last year
• yhtzd / skyloft
  Skyloft: A General High-Efficient Scheduling Framework in User Space (SOSP 2024)
  ☆32Updated 5 months ago
• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated 2 years ago
• HUST-OS / design-pattern-notes
  各类内核的设计思路
  ☆19Updated 3 years ago
• jiegec / naiverouter
  A router IP written in Verilog.
  ☆13Updated 5 years ago
• DeathWish5 / rCore_tutorial_tests
  rCore_tutorial_tests
  ☆10Updated 3 years ago
• OS-F-4 / usr-intr
  项目的主仓库
  ☆23Updated 2 years ago
• efeslab / eecs582
  Course website for Advanced Operating Systems
  ☆13Updated 2 years ago
• luojia65 / zihai
  自嗨虚拟化软件 - 'Enjoy yourself' type-1 hypervisor software
  ☆25Updated 2 years ago
• pku-minic / first-step-rs
  Take your first step in writing a compiler. Implemented in Rust.
  ☆15Updated last year
• Oyami-Srk / RISCV-GDB-Paging
  Paging Debug tool for GDB using python
  ☆13Updated 2 years ago
• char-fish-after-lunch / SystemOnCat
  An SoC with multiple RISC-V IMA processors.
  ☆19Updated 6 years ago
• yukiiiteru / DailySchedule_2020
  OS Tutorial Summer of Code 2020
  ☆19Updated 2 years ago
• IPADS-DuVisor / kvm-tutorial
  ☆23Updated last year
• ShawnZhong / MadFS
  Source code for the FAST '23 paper “MadFS: Per-File Virtualization for Userspace Persistent Memory Filesystems”
  ☆39Updated 2 years ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated last year
• wangyisong1996 / most
  Codes for MO's Trading
  ☆15Updated 2 years ago
• MashPlant / lalr1
  An LALR1(1)/LL(1) parser generator in Rust, for multiple languages.
  ☆49Updated 2 years ago
• LyricZhao / ThinRouter
  A SystemVerilog implementation of MIPS32 CPU and RIP router
  ☆21Updated 5 years ago
• rcore-os / nvme_driver
  ☆30Updated last year
• were / bfsh
  Being a full-stack hacker, RISCV, LLVM, and more.
  ☆18Updated 3 years ago
• TianhuaTao / uCore-SMP
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆30Updated 2 years ago
• chyyuu / zCore-Design
  ☆13Updated 3 years ago
• typekernel / typekernel
  Warning: 🕳 ahead!
  ☆16Updated 5 years ago
• oscomp / proj4-xv6-rust
  用Rust语言重新设计与实现xv6
  ☆35Updated 3 years ago
• jiegec / verilog-lang
  A hand-written recursive decent Verilog parser.
  ☆11Updated 2 years ago
• TrivialCompiler / Talk
  Tex source for talk slide.
  ☆10Updated 4 years ago